UPDATE: Everybody Loves a Winner

UPDATE: Everybody Loves a Winner
by Mike Gianfagna on 04-05-2020 at 9:00 am

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Building a successful startup is hard, very hard. Creating a new category along the way is even more difficult. Those that succeed at both endeavors are quite rare. This is why an upcoming ESD Alliance event is a must-see in my view. The event is entitled “Jim Hogan and Methodics’ Simon Butler on Bootstrapping a Startup to ProfitabilityRead More


Filling the ASIC Void – Part 2

Filling the ASIC Void – Part 2
by Mike Gianfagna on 04-03-2020 at 6:00 am

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I concluded my last post on the topic with an inventory of the key attributes needed to fill the ASIC void created by the relentless consolidation in semiconductors. There were five items, as follows:

  1. Design and manufacturing expertise in a market that requires custom chips
  2. Differentiating IP and the skills to integrate it into
Read More

Chip-to-Chip Communication for Enterprise and Cloud

Chip-to-Chip Communication for Enterprise and Cloud
by Mike Gianfagna on 04-01-2020 at 6:00 am

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I recently had the opportunity to attend a SemiWiki webinar entitled “Chip-to-Chip Communication for Enterprise and Cloud”.  The webinar was presented by SiFive and explored chip-to-chip communication strategies for a variety of applications.  In the first part of the webinar, Ketan Mehta, director of SoC IP product marketing… Read More


Filling the ASIC Void – Part 1

Filling the ASIC Void – Part 1
by Mike Gianfagna on 03-27-2020 at 6:00 am

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It started slowly at first.  Then it began picking up steam. I’m referring to consolidation in the semiconductor sector. I had a front-row seat for what consolidation did to the ASIC part of semiconductor and that is the topic of this discussion. I was the VP of marketing at eSilicon, the company that invented the fabless ASIC model.… Read More


Security in I/O Interconnects

Security in I/O Interconnects
by Mike Gianfagna on 03-25-2020 at 10:00 am

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I got a chance to chat with Richard Solomon at Synopsys recently about a very real threat for all of us and what Synopsys is doing about it. No, the topic isn’t the Coronavirus, it’s one that has been around a lot longer and will continue to be a very real threat – data and interconnect security.

First, a bit about Richard. He is the technical… Read More


Prevent and Eliminate IR Drop and Power Integrity Issues Using RedHawk Analysis Fusion

Prevent and Eliminate IR Drop and Power Integrity Issues Using RedHawk Analysis Fusion
by Mike Gianfagna on 03-24-2020 at 10:00 am

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I had the opportunity to preview an upcoming SemiWiki webinar on IR drop and power integrity. These topics, all by themselves, have real stopping power. Almost everyone I speak with has a story to tell about these issues in a recent chip design project. When you combine hot topics like this with a presentation that details the collaboration… Read More


Cadence Digital Full Flow Optimized to Deliver Improved Quality of Results with Up to 3X Faster Throughput

Cadence Digital Full Flow Optimized to Deliver Improved Quality of Results with Up to 3X Faster Throughput
by Mike Gianfagna on 03-23-2020 at 6:00 am

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Artificial intelligence (AI) and machine learning (ML) are hot topics. Beyond the impact these technologies are having on the world around us, they are also having impact on the semiconductor and EDA ecosystem. I posted a blog last week that discussed how Cadence views AI/ML, both from a tool and ecosystem perspective. The is one… Read More


Machine Learning for EDA – Inside, Outside and Everywhere Else

Machine Learning for EDA – Inside, Outside and Everywhere Else
by Mike Gianfagna on 03-18-2020 at 6:00 am

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Artificial intelligence (AI) is everywhere. The rise of the machines is upon us in case you haven’t noticed. Machine learning (ML) and its associated inference abilities promise to revolutionize everything from driving your car to making breakfast. We hear a lot about the macro, end-product impact of this technology, but there… Read More


5G SoCs Demand New Verification Approaches

5G SoCs Demand New Verification Approaches
by Mike Gianfagna on 03-16-2020 at 10:00 am

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Lately, I’ve been cataloging the number of impossible-to-verify technologies we face. All forms of machine learning and inference applications fall into this category. I’ve yet to see a regression test to prove a chip for an autonomous driving system will do the right thing in all cases. Training data bias is another interesting… Read More


Turbo-Charge Your Next PCIe SoC with PLDA Switch IP

Turbo-Charge Your Next PCIe SoC with PLDA Switch IP
by Mike Gianfagna on 03-12-2020 at 6:00 am

Integrated NVMe interfaces

SemiWiki has a new IP partner, PLDA and they bring a lot to the party.  Peripheral component interconnect express (PCIe) is a popular high-performance data interface standard. Think GPUs, RAID cards, WiFi cards or solid-state disk (SSD) drives connected to a motherboard. The protocol offers much higher throughput than previous… Read More