Cadence is Making Floorplanning Easier by Changing the Rules

Cadence is Making Floorplanning Easier by Changing the Rules
by Mike Gianfagna on 11-25-2020 at 8:00 am

Mixed placement floorplan

SoC designs are getting more complex, resulting in a higher level of difficulty to get anything done. This trend is well-known. What I want to focus on here is how to deal with the issue of complexity. There are many approaches to taming this problem — faster algorithms for one, and improved algorithm efficiency or the ability to run… Read More


Webinar: Menta is Breaking New Ground with eFPGA IP Using Adaptive DSP

Webinar: Menta is Breaking New Ground with eFPGA IP Using Adaptive DSP
by Mike Gianfagna on 11-23-2020 at 10:00 am

Webinar Menta is Breaking New Ground with eFPGA IP Using Adaptive DSP

Menta is a unique embedded FPGA (eFPGA) company. Their eFPGA IP is based completely on standard cells provided by the foundry, the customer or a third party – no custom cells or custom cell characterization is needed. They also don’t require any specific library, process step or metal stack. All this makes Menta’s eFPGA IP easy to… Read More


Silicon Catalyst Hosts Semiconductor Industry Forum – A View to the Future … it’s about what’s next®

Silicon Catalyst Hosts Semiconductor Industry Forum – A View to the Future … it’s about what’s next®
by Mike Gianfagna on 11-20-2020 at 10:00 am

A View to the Future ... its about whats next

Silicon Catalyst has been hosting semiconductor forums since 2018. At these events, a group of industry leaders gathers to discuss trends in the semiconductor industry and what the future may hold as a result. I recently had an opportunity to speak with Pete Rodriguez, CEO at Silicon Catalyst. Pete explained that these forums … Read More


Achieving 112Gbps PAM4 Channels with Achronix FPGAs and Samtec Interconnect

Achieving 112Gbps PAM4 Channels with Achronix FPGAs and Samtec Interconnect
by Mike Gianfagna on 11-19-2020 at 10:00 am

Achieving 112Gbps PAM4 Channels with Achronix FPGAs and Samtec Interconnect

They say that getting there is half the fun. On December 1, Achronix and Samtec will present a webinar on this topic in the context of high-performance front panel to midplane and midplane to backplane channel design. Technology, materials and system design will all be discussed with a focus on achieving 112Gbps PAM4 channels with… Read More


The Six Signs That You Need a Yield Management System

The Six Signs That You Need a Yield Management System
by Mike Gianfagna on 11-18-2020 at 6:00 am

The Six Signs That You Need a Yield Management System

If you search on “the six signs” you will find references to a fantasy novel, “The Dark is Rising Sequence” by Susan Cooper. In this fantasy work there are six signs: wood, bronze, iron, water, fire and stone. Their purpose has something to do with driving away the Dark. Here is a quote from the book that puts these six signs in some context:… Read More


Powering the Next Generation of Hearables and Wearables with Chipus

Powering the Next Generation of Hearables and Wearables with Chipus
by Mike Gianfagna on 11-16-2020 at 10:00 am

Powering the Next Generation of Hearables and Wearables with Chipus

Chipus is an interesting company. It’s been around since 2008 and focuses on mixed-signal ASICs, intellectual property blocks and IC design services. They are headquartered on the island of Florianopolis, which is described as the most dense startup ecosystem in Brazil. The company has substantial skills in analog and mixed… Read More


The History and Significance of Power Optimization, According to Jim Hogan

The History and Significance of Power Optimization, According to Jim Hogan
by Mike Gianfagna on 11-13-2020 at 10:00 am

Jim Hogan

Power seems to be on everyone’s mind these days. Hyperscale data centers worry about operating costs unless power is optimized. The AI accelerators in the Edge can’t be effective without optimized power. Advanced 2.5 and 3D packages simply can’t remove the heat unless power is optimized.  And then there’s all those gadgets we … Read More


SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference

SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference
by Mike Gianfagna on 11-11-2020 at 10:00 am

SiFive Expands RISC V Technology and its Ecosystem at the Fall Linley Processor Conference

 

As the Linley Fall Processor Conference winds down, there are certain presenting companies that left a lasting impression.  SiFive is one of those companies. On October 21, SiFive introduced the newest member of the SiFive Intelligence family of processor coresSiFive Intelligence family of processor cores, based on… Read More


Achronix is Driving the Fourth FPGA Wave

Achronix is Driving the Fourth FPGA Wave
by Mike Gianfagna on 11-09-2020 at 8:00 am

Achronix and the Fourth FPGA Wave

Technology typically evolves in waves. Sometimes it’s referred to as a “revolution” or an “age”. The industrial revolution and the information age are examples. These kinds of categorizations help to clarify the impact of innovation in ways that are relevant to everyone – you can’t look away if the world is changing around you.… Read More


Creating Workflows for HCL Compass Just Got Easier

Creating Workflows for HCL Compass Just Got Easier
by Mike Gianfagna on 11-05-2020 at 10:00 am

Creating Workflows for HCL Compass Just Got Easier

Workflows allow the world to function. The orderly process of sequencing tasks and automating handoffs creates tremendous potential for efficiency and error avoidance. As they say, time is money and workflows can save a lot of time. The principle applies in all kinds of industries. If you design chips for a living, you’re very … Read More