3 IoT demos highlight Atmel SAMA5

3 IoT demos highlight Atmel SAMA5
by Don Dingee on 03-04-2016 at 4:00 pm

At the high end of the Atmel product spectrum resides SAMA5 based on an ARM Cortex-A5 core. With an MMU supporting Linux or Android, plus on-the-fly memory encryption and ARM TrustZone in some variants, the SAMA5 family is drawing interest from IoT app developers. We’ll look at three examples, all illustrating how important seamless… Read More


OCF shows there may be hope for IoT consortia yet

OCF shows there may be hope for IoT consortia yet
by Don Dingee on 03-02-2016 at 4:00 pm

The recent launch of the Open Connectivity Foundation (OCF) was met first with a wave of “oh good, another IoT consortium”, then “phew, it’s just a rebrand of the OIC”, followed by a bit of confusion over why a few AllSeen Alliance players and some other names jumped in. Is it just a marketing ploy, or is there more to this?… Read More


FPGA tools for more predictive needs in critical

FPGA tools for more predictive needs in critical
by Don Dingee on 02-29-2016 at 4:00 pm

“Find bugs earlier.” Every software developer has heard that mantra. In many ways, SoC and FPGA design has become very similar to software development – but in a few crucial ways, it is very different. Those differences raise a new question we should be asking about uncovering defects: earlier than when?… Read More


Aldec reprograms HES7 for AXI4 speed

Aldec reprograms HES7 for AXI4 speed
by Don Dingee on 02-26-2016 at 4:00 pm

FPGA-based prototyping firms are all grappling with the problem of higher speed connectivity between a development host and their hardware. Aldec is announcing their solution at DVCon 2016, turning to an AMBA AXI4 interface bridged into a host with PCIe x8.

Faster host interfaces deliver dual benefits in FPGA-based prototyping.… Read More


Mentor ARM subscription signals ecosystem shift

Mentor ARM subscription signals ecosystem shift
by Don Dingee on 02-25-2016 at 4:00 pm

Since creating the landmark “all-you-can-eat” license with Samsung in 2002, ARM has inked several subscription deals with chipmakers and EDA firms. The latest ARM subscriber license deal just announced is for Mentor Graphics. What makes their strategy unique?… Read More


tinyAVR in 8 and 14 pin SOIC now self-programming

tinyAVR in 8 and 14 pin SOIC now self-programming
by Don Dingee on 02-24-2016 at 4:00 pm

At this week’s Embedded World 2016, Atmel is heading back to 8-bit old school with their news, straight to the low pin count end of their MCU portfolio with a significant upgrade to the tinyAVR family.

According to Atmel’s briefing package, development of the ATtiny102 and ATtiny104 has been in progress for some time.… Read More


S2C opens up FPGA prototyping for PCIe fabrics

S2C opens up FPGA prototyping for PCIe fabrics
by Don Dingee on 02-23-2016 at 4:00 pm

Reconfigurable computing began with FPGA cards dropped into expansion slots in workstations. FPGA-based prototyping vendors tended away from that model as interconnect speeds rose and cabling complexity between modules increased. Much faster PCIe interfacing and bigger FPGAs mean revisiting the concept.… Read More


SoC power management a study in transition latency

SoC power management a study in transition latency
by Don Dingee on 02-22-2016 at 4:00 pm

Apple’s recent bout with ‘Batterygate’ highlighted just how important dynamic power management can be. Our last Sonics update looked at using their NoC to manage power islands; this time, we look at their research progress on architectural measures for power management.… Read More


New CEVA X baseband architecture takes on multi-RAT

New CEVA X baseband architecture takes on multi-RAT
by Don Dingee on 02-18-2016 at 4:00 pm

What we think of as a “baseband processor” for cellular networks is often comprised of multiple cores. Anecdotes suggest to handle the different signal processing requirements for 2G, 3G, and 4G networks, some SoC designs use three different DSPs plus a control processor such as an ARM core. That’s nuts. What is the point of having… Read More


Reconfigurable redefined with embedded FPGA core IP

Reconfigurable redefined with embedded FPGA core IP
by Don Dingee on 02-12-2016 at 7:00 am

On November 1, 1985, before anyone had heard the phrase field programmable gate array, Xilinx introduced what they called a “new class of ASIC” – the XC2064, with a whopping 1200 gates. Reconfigurable computing was born and thrived around the RAM-based FPGA, whose logic and input/output pins could be architected into a variety… Read More