DAC’s technical program offers the best-in-class solutions that promise to advance Electronic Design Automation (EDA) and Embedded Systems and Software (ESS). DAC 2013 is seeking submissions that deal with design technologies and algorithms, addressing all aspects of electronic design across several submission categories.… Read More
Author: Daniel Nenni
Exclusive Sneak Peek: Cadence at TSMC OIP Ecosystem Forum 2012
The TSMC Open Innovation Platform® (OIP) Ecosystem Forum brings TSMC’s design ecosystem member companies together to share with our customers real-case solutions for customers’ design challenges and success stories of best practice in TSMC’s design ecosystem. More than 90% of the attendees last year said “this… Read More
Linley Tech Processor Conference 2012
Learn everything you need to know about processors for enterprise- and carrier-communications systems. We have added more Speakers and industry experts and expanded the two-day conference program with 25 % more sessions.
We will be featuring presentations on the newest processors with multiple cores, programmable data planes,… Read More
GLOBALFOUNDRIES and ARM!
Clearly the key to success in the foundry business is partnerships. Easy to say, harder to do, here is an excellent example of one that works: GLOBALFOUNDRIES and ARM announced in August 2012 a multi-year agreement to jointly deliver optimized system-on-chip (SoC) solutions for ARM® processor designs on GLOBALFOUNDRIES’ 20-nanometer… Read More
Dilbert Does Social Media!
Dilbert has always been a favorite comic of mine because it is based on truth and there is no better humor than truth, especially at work. According to Wikipedia; Scott Adams and Dilbert came to national prominence through the downsizing period in 1990s America. A former worker in various roles at big businesses, he became a full-time… Read More
A Brief History of Atrenta and RTL Design
We’re plagued by acronyms in this business. Wikipedia defines RTL as follows: “In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of digital signals (data) between hardware registers, and the logical operations performed on those… Read More
Aldec-Altera DO-254
As described in DO-254, any inability to verify specific requirements by test on the device itself must be justified, and alternative means must be provided. Certification authorities favor verification by test for formal verification credits because of the simple fact that hardware flies not simulation models. Requirements… Read More
CEVA DSP Technology Symposium Series 2012
You are cordially invited to register to attend the CEVA DSP Technology Symposium Series 2012, which will take place in Taiwan, October 16th, China, October 18th and Israel, November 1st.
CEVA’s industry-leading experts and engineers will present a full day of lectures and seminars where you will learn about the latest technological… Read More
A Brief History of Helic
As I have mentioned before, you can tell al lot about a company by their CEO. The previous trip I made to Taiwan was with Helic co-founder and CEO Dr. Yorgos Koutsoyannopoulos. One of the benefits of my job is I get to spend time with some very interesting people from around the world and this was no exception.
Prior to founding Helic, … Read More
Taiwan Travel Explained!
Whenever people hear that I travel internationally one week a month they cringe at the thought of crowded airports, 12 hour flights, jet lag, and days packed with meetings. I generally shrug, accept the label of travel warrior, and say it is all part of doing business in the semiconductor ecosystem. But in reality, it is not as bad … Read More
Unlocking the cloud: A new era for post-tapeout flow for semiconductor manufacturing