Can you Publicly Benchmark EDA Tools?

Can you Publicly Benchmark EDA Tools?
by Daniel Nenni on 10-08-2013 at 7:00 pm

There is an interesting discussion on SemiWiki in regards to the age old question aboutbenchmarking EDA tools. I remember benchmark discussions at my first DAC in 1984. It was deemed impossible to do a “fair” public benchmark then and it’s not possible now, just my opinion of course but let me tell you why. Simply stated it is a legal,… Read More


A Big Thank You to EDA and IP

A Big Thank You to EDA and IP
by Daniel Nenni on 10-05-2013 at 10:00 pm

Electronic Design Automation Software and Semiconductor Intellectual Property are not so much the tail that wags the dog, rather they are like the heart of an elephant, tiny in comparison but without which there is no elephant. There is no doubt that EDA and IP have been key enablers of the semiconductor industry for the past 50 years… Read More


TSMC OIP 2013 Trip Report!

TSMC OIP 2013 Trip Report!
by Daniel Nenni on 10-04-2013 at 4:00 pm

The 5[SUP]th[/SUP] annual TSMC OIP Forum was last week and thankfully there were no surprises with the exception of how many people asked me who I think will be the next TSMC CEO. Certainly I have no idea but I would be happy to use my incredible powers of deductive reasoning to determine who it will be.

The TSMC Open Innovation Platform®Read More


Computer History Museum Party!

Computer History Museum Party!
by Daniel Nenni on 10-04-2013 at 3:00 pm

More details are now available for the EDA 50[SUP]th[/SUP] anniversary event on October 16[SUP]th[/SUP]. If you have not been to the museum lately this is a must see event as it is all new. Definitely check out the auction items! Just do not bid against me or it will get very expensive for one of us. I’m watching Storage Wars reruns so… Read More


High-Sigma Standard Cell Optimization!

High-Sigma Standard Cell Optimization!
by Daniel Nenni on 10-03-2013 at 11:00 am

Standard cell optimization is an important problem, because the speed, power, and area of cells has a direct impact speed, power, and area of the whole chip. Typically, standard cell optimization been done with simple in-house local-optimizer scripts. However, these optimizers have had several flaws: they don’t properly capture… Read More


TSMC Awards Berkeley Design Automation

TSMC Awards Berkeley Design Automation
by Daniel Nenni on 10-02-2013 at 11:00 am


One of the highlights of the TSMC 2013 Open Innovation Platform® Forum was the Partner Award Ceremony. TSMC awarded Berkeley Design Automation (BDA) with the TSMC Open Innovation Platform’s Partner of the Year Award 2013 for joint development of 16nm FinFET design infrastructure. I talked with Ravi Subramanian, BDA CEO,… Read More


The US Executive Forum 2013

The US Executive Forum 2013
by Daniel Nenni on 09-26-2013 at 10:00 am

The US Executive Forum hosted by the Global Semiconductor Alliance was held last night at the beautiful Rosewood Sand Hill Hotel in Menlo Park. We all have memorable events in our professional lives and this is one of mine, absolutely. The audience was filled with semiconductor executives from around the world who chatted freely… Read More


Intel 14nm versus Samsung 14nm

Intel 14nm versus Samsung 14nm
by Daniel Nenni on 09-25-2013 at 4:15 am

The legend of Intel being two process nodes ahead of the rest of the industry is quickly coming to an end. To come to terms with this you need to do an apple to apple comparison which is what I will do right here, right now.

First and foremost let’s compare SoC silicon delivery since SoCs are driving the semiconductor industry and will … Read More


A Brief History of Silvaco

A Brief History of Silvaco
by Daniel Nenni on 09-23-2013 at 5:00 pm

Silvaco is the leading supplier of TCAD software, and a major supplier of EDA software for circuit simulation and design of analog, mixed-signal and RF integrated circuits.

The company was founded in 1984 by Dr. Ivan Pesic. The initial product, Utmost, quickly became the industry standard for parameter extraction, device characterization… Read More


Process Variation is a Yield Killer!

Process Variation is a Yield Killer!
by Daniel Nenni on 09-20-2013 at 11:00 am

With the insatiable wafer appetites of the fabless semiconductor companies in the mobile space, yield has never been more critical. The result being better EDA tools every year and this blog highlights one of the many examples. It has been a pleasure writing about Solido Design Automation and seeing them succeed amongst the foundries… Read More