Senior Post-Silicon Validation Engineer

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix’s FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix’s products are supported by best-in-class EDA software tools.

Job Description/ResponsibilitiesThe successful candidate will join, as a key member, a team of post-silicon validation engineers that work towards the productization of high-performance FPGAs in 7nm and below. Responsibilities include:

• Work with leading-edge protocols, including PCIe Gen5, 400Gbps Ethernet, die-to-die communications and high-speed external memory interfaces such as GDDR6, HBM and DDR5
• Drive the bring-up, hardware validation and debug of new FPGA products
• Execute detailed test plans based on specifications, outlining validation experiments and procedures
• Selection, acquisition and set-up of required test equipment and software, leveraging automation wherever possible
• Analyze results and measurements, develop visualizations to assist in deeper understanding of data
• Collaborate with hardware and software teams to resolve hardware issues and optimize results
• Collaborate with the operations team to optimize parametric yield from high volume ATE tests

Skills and Qualifications:

• MS in Electrical/Computer Engineering with 4+ Years of experience in digital design/verification and/or post-silicon validation
• Proficiency in scripting languages such as Python, Perl and TCL
• Proficiency in tools and methods for data collection and organization
• Familiarity with high-end serial protocols (e.g., PCIe Gen3/4/5 and 100/200/400Gbps Ethernet)
• Familiarity with high speed external memory interfaces (e.g., DDR4/5 memory protocols)
• Familiarity with PLLs and I/O standards
• Familiarity with test and measurement equipment:
  • High-bandwidth Oscilloscopes
  • BERTs
  • Serial and memory protocol analyzers and exercisers
• Familiarity with signal and power integrity aspects of high speed interfaces, packages, and PCBs a plus
• Experience with FPGA design and implementation is desirable
• Excellent debugging skills
• Excellent verbal and written communication skills