It Isn’t Transistory

There’s a quiet upheaval happening in the semiconductor industry. The rules that have always governed the industry are fraying, undoing assumptions that we took for granted, that was pounded into us in school. The irreproachable Moore’s Law, that exponential progress will make things cheaper, better, and faster over time, is dead.

People are starting to appreciate that making a chip is not easy. Shortages and the geopolitical concentration of TSMC and ASML have awakened the popular imagination and have highlighted the science-fiction-like process of chipmaking. The road ahead has obstacles that aren’t widely appreciated. Making a semiconductor is going to get even harder, more expensive, and more technical. In other words, the challenges are going to accelerate.

To operate in the future, chipmakers will need more scale, more talent, and more money. I’ve written about this before, but I want to dive deeper into what’s driving the rising costs of making a semiconductor. It affects the entire range of chips, from the most advanced chips to the most basic. The trend is not new, it’s already been happening, but I believe now it will start to pick up speed. And the price increases will likely impact every person on earth. This inflationary cost is not transitory.

To understand how we got here, I want to first refresh you on the death of Moore’s Law. We’ve topped out the growth in transistor-energy scaling, frequency scaling, and we’re starting to hit the end of multi-core scaling in transistor-density increases. But more important than the end of those trends, cost scaling has ended. While we continue to improve transistor density through new techniques, each one layers additional costs.

ASML, in its investor day, made a bold statement that Moore’s Law will continue with system-level scaling. Another name for this is advanced packaging. But these costs are additive to the already escalating costs of making a smaller transistor.

While I believe Advanced Packaging is going to solve the transistor-density problem, I don’t believe it will make chips cheaper. In fact, transistors per dollar have gotten more expensive since the early 2010s.

I want to focus not just on the technological headwinds, but the cost headwinds. One of the major historical assumptions of Moore’s Law is that not only would your transistors double every two years, but the cost of the transistors would decline. No longer. The chart below is from Marvell’s 2020 investor day. The bar for 28nm was approximately 2011-2012.

What’s interesting is that a qualitative change happened around 28nm, as it was one of the last planar nodes. Planar in plain language is a two-dimensional surface (plane), while FinFET – the technology that replaced planar – introduced a “fin” into the transistor to jut upwards, creating a 3D structure instead of a 2D structure. We are now on the verge of yet another gate transition – gate-all-around (GAA), which is an even more 3D-intensive structure. As we switch to GAA or the next iteration of gate technology, I believe that the cost increases per 100m gates will continue to increase, just like they did for FinFET over planar. This is driven by the increased complexity of making these chips — namely, the added number of steps in manufacturing.

It isn’t just this transition that’s pushing costs higher. The lagging edge — older chips — is starting to get more expensive, too. The story here is not technological, but rather economic, and what was once ample capacity with commodity-like returns is starting to become in-demand. Businesses are not willing to add capacity unless subsequent price increases follow. This is another key driver, not just on the most advanced but in the older chips as well.

Finally, not just old chips and new chips, but the companies that make the chips (semiconductor fabs) are becoming more consolidated and more strategic. There really isn’t a lot of room at the leading edge, where the most advanced chips are made. This is the third driver of semiconductor costs, that fabs that offer a one-of-a-kind product are passing their rising costs on to customers. TSMC is not a price-taker, and the world is reliant on its products. Despite the increasing costs, they’re are starting to extract larger profits. Fabless companies have no choice but to pay more.

Each of these themes deserves a deeper dive. I’ll start first with my favorite topic: Semicap – or the tools that are required to make a chip.

Industry Consensus: Semicap Cost Intensity Will Go Up

One of the universal themes this earnings season was the higher cost of tools to make semiconductors. The real warning shot was this slide that Tokyo Electron presented at its investor day.

The drastic price increase is broad-based and is across DRAM, NAND, and Logic. Given that 5nm is in production today, this is not a prediction, but a trend that’s going to continue. The primary driver is not only the rising costs of tools such as EUV, but the rising number of steps to make a chip. Below is a graphic that shows the increase of steps over time.

It’s just not Tokyo Electron making the call for higher intensity alone. This most recent earnings season, TSMC, Lam Research, KLAC, and other Semicap companies called out rising intensity. I think all else being equal, the cost of 100K wafer starts should start to rise low- to mid-single digits per chip at the leading edge. Another way to look at this is from the top-down perspective. I compared the total capacity shipped in Million Square Inches (MSI) and compared this to wafer-fab equipment growth. Think of this as total volume versus the spending to make more wafers.

Excuse the 5-year averages, the numbers year to year are much bumpier. The workbook is attached at the end of this post, by the way.

The relationship used to be that spending on new fab equipment under paced the expansion of MSI, as each tool purchased would give more capacity. I want to highlight that if you squint, you can see that the relationship of WFE and MSI seemed to have flipped somewhere around 2012. This coincides with the 28nm node or the crucial node where cost increases started. Going forward I think that we should expect WFE to increase faster than historical averages.

From 2012 to 2020, MSI increased at a compound annual growth rate of 3.6%, and WFE increased at a compound annual growth rate of 8.0%. This is roughly double capacity additions. If demand for semiconductor devices continues to increase, then MSI should grow faster, and thus WFE at a higher multiplier. I am unsure if WFE’s relationship holds at 2x of MSI growth, but it should be a multiplier higher – say, 1.5x-2x MSI. That’s acceleration compared to its historical rate, and what’s driving that is the demand for semiconductors and the technological headwinds we’re facing.

I want to move now to another trend that got called out repeatedly this last earnings season that frankly surprised me but is surprisingly logical: old chips are more expensive.

Old Chips Cost More

It’s not just the newest, fastest, and most expensive chips that are costing more because of technological problems. The most interesting trend recently is that old chips are starting to drive price increases. The recent inflection in Automotive semiconductors is driving demand, not for the latest and greatest, but older and more mature technologies. The problem is that there never has been meaningful capacity added for older technologies, and most of the time fabs would just become “hand-me-downs” as the leading edge pushed forward and the fab equipment would continue to be used and depreciated. Using fully depreciated fab equipment meaningfully lowered the cost to make a semiconductor, especially after 10+ years.

That’s been an important aspect of pricing. A fab being maintained without much incremental capital, yet still producing chips, is what has driven down the price of older chips so much over time. Often there would even be improvements in yield, which further lowered costs. The thinking went that a leading-edge chip that cost hundreds of dollars in 2000 would cost pennies in 2021 because the fab would be fully depreciated.

But there’s a problem with that. We have a situation that’s never happened before. Historically, demand was clustered toward the leading edge. Today, we have demanded at the lagging edge, too. In fact, the demand for older chips is starting to rise sharply. This is driven by automotive and IoT production, as most of these applications are older, more mature technologies, which have better yield, cost, and, importantly, reliability. And even though demand has spiked, no capacity has been added. It’s very rare to add to lagging-edge production.

Up until very recently, there was ample capacity at the lagging edge. It would have been unheard of to add capacity to the lagging edge. A fab was considered “full” if it was running at 80%. Now, trailing-edge fabs are running at close to 100%. Something must change.

This is one of the drivers of the automotive semiconductor shortage: higher demand and no supply or incentives to add more supply. Most semiconductor firms and fabs are obsessed with the leading edge because they can make higher profits. Now firms are waking up to maintaining the lagging edge. The “old” chips are becoming just as important as new chips, and to add capacity, firms had to start making large capital additions again.

There are obvious pricing problems in this scenario. With a new fab, a company can’t turn a profit selling a lagging-edge chip at the price that was previously dictated by a fully depreciated fab. Prices have to go up. This dynamic was discussed by Silicon Lab’s CEO last quarter:

just in terms of the cost increases and the durability of that, I think that we are going into kind of a new phase of the semiconductor industry, where we’ve got Moore’s Law and advanced nodes becoming more and more expensive and you’ve got mainstream technology now full. And it used to be that the digital guys would move out and the N minus 1, N minus 2, N minus 3 nodes would be fully depreciated fabs that you would move into. We have now reached a point where the mix, the ratio between advanced and mainstream is causing fabs TSMC and others to build new mainstream technology, and that means that those fabs are not fully depreciated. So a large element of the cost increases that the industry is seeing right now is because of the additional CapEx that’s having to be put in to build new capacity across the nodes, not just at the advanced nodes, but across.

And so if you look at the cost increases that we’re seeing in other — it’s across the industry, there is a certain element of that, that’s durable over time. And so this is a step function in terms of the cost structure of the industry to match the demand that we’re seeing and the increasing content of electronics throughout the economy and the acceleration of demand that we’ve seen through the pandemic has really pushed that forward and driven us into the supply constraints. We’ll work through that, but to work through that is requiring a lot of CapEx, and that’s got to be recouped. And that’s got to flow upstream from our suppliers to us, to our customers and that’s what you’re seeing right now.

What’s great is that this wasn’t a single company saying this in a vacuum. On Semi, NXP Semiconductors, Microchip, and other “mainstream” or lagging-edge semiconductor companies affirmed that this is going to continue because demand at the lagging edge is higher than supply. This is completely new territory for the industry, and not only a confirmation of the strategic importance of semiconductors, but a confirmation of the broad-based demand. There is really only one solution — adding capacity — but fabs are uncertain they could make a profit adding greenfield lagging edge without raising prices. In turn, they’re concerned about the demand for these “new” lagging-edge chips.

It’s a standoff. Fabs and semiconductor companies are uncertain that this will last, but Auto OEMs and the like seem to have insatiable demand. For a fab, it’s hard to change your behavior in one year against a trend that has lasted decades. Even harder is to go through those difficult changes and expect customers to accept higher prices. UMC put it well in its Q2 2021 call:

But for any greenfield capacity expansion, for the mature node, you are competing with a fully — most likely, you’re going to be competing with a fully depreciated capacity. Unless the demand is significantly important to the customer, but the economics — if the economics stay the same, it will be very difficult to have a justified ROI. However, if the customer is willing to face those challenges together with us, we will definitely explore those opportunities.

Put differently, pay up or continue the shortage. And given that the lead times aren’t really improving, I think that paying up marginally will be the outcome. There has to be some kind of compromise here, and right now it’s coming in the form of non-cancelable, non-returnable orders (NCNR). Fabs are not going to expand trailing-edge capacity unless their customers truly commit to orders that cannot be canceled or returned. It’s uncertain how much double ordering is going on, but NCNRs are a pretty strong commitment to adding long-lived demand.

While the addition of capacity should eventually smooth out price increases over time, this will take multiple years, especially if the demand from automotive and IoT devices continues. I don’t think that prices will rise forever in lagging edge, but I think that we should expect the relationship of historical price decreases to not be as large as they used to be. Lastly, that leaves me with the 800-pound gorilla — Taiwan Semiconductor Manufacturing Company.

TSMC Is Not Lowering Its Prices

Tool prices for leading-edge products are increasing, and this should hurt the margins of TSMC and other leading-edge fabs. While we can gross margin contraction at Intel, this is more a function of company-specific investment to catch up to TSMC. But at TSMC, the exact opposite is happening. TSMC is convinced that it can improve its margin with smaller nodes. The company reiterated this multiple times on its calls, and given TSMC’s one-of-a-kind product, the higher gross margin is very justified. The reality is that TSMC is not a price-taker, but a price-setter. The primary reason: It has a stranglehold on all leading-edge manufacturing.

100% of sub-10nm logic in the world was made at TSMC in 2019. It’s likely that Samsung has caught up, but in terms of the leading edge, it’s just TSMC leading the pack. Given the concentration of fabrication power at TSMC, customers really don’t have another option. If a fabless company wants to sell its latest and greatest chips at a higher margin, they must go to TSMC. Meanwhile, TSMC’s gross margin has slowly drifted higher over the years.

Despite intense CapEx increases which flow through to the Cost of Goods sold as Depreciation, their gross margin is still high and the company believes it will stay that way.

TSMC put it this way on its most recent call and given its absolutely staggering outright capital expenditures, I believe it’s justified:

Even as we shoulder a greater burden of the investment for the industry, by taking such actions, we believe we can achieve a proper return that enables us to invest to support our customers’ growth and deliver long-term profitable growth with 50% and higher gross margin for our shareholders.

Right now in order to shoulder the higher CapEx burden, the company is passing on prices meaningfully. It recently hiked chip prices by 20%, and it can and will raise prices more if the continued cost of making an advanced semiconductor continues. Until the situation changes, there’s no other meaningful competition in town. If Samsung and Intel get their act together in foundry, maybe they will be willing to take lower gross margins, but until then it’s TSMC’s world we’re living in. It’s going to raise prices on the back of higher capital costs.

The Price of a Semiconductor is Rising and It’s Not Transitory

Each of these factors on its own would be a tailwind to rising prices. Together, it’s a certainty that prices are going to rise from here. Between more steps leading to higher tool costs, the declining economic benefit of Moore’s Law, and lagging-edge capacity problems, I believe that the historical cost declines we have seen in semiconductors will start to slow. In some places, I believe the price increases in the trailing edge will be here to stay. Before you go wild with inflation speculation, I want to reiterate that semiconductors are only a ~$530 billion industry or half of a percent of global GDP. This is not going to cause rampant inflation everywhere.

The demand side of the equation doesn’t seem to be slowing in the slightest. The higher demand is coming from the highest number of verticals, with PC, Mobile, Data center, Automotive, and IoT each as a credible and large growing end market. Certain applications are more compute-intensive going forward, such as machine learning. As software ate everything in our lives, silicon made the meal possible. All this is happening as Moore’s Law is screeching to a halt. In simple terms: higher demand + lower supply improvements = price goes up.

I’m going to dive into who I think benefits in the paid-only section. Thanks for reading this far.

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