Essential Debugging Techniques Workshop

Essential Debugging Techniques Workshop
by Admin on 06-12-2025 at 1:48 pm

Essential Debugging Techniques Workshop

This workshop is for hardware engineers, system architects, and anyone who wants to learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, and embedded systems using the Vivado Design Suite. The features and capabilities of the Vivado

Read More

Achieving Timing Closure in FPGA Designs Workshop

Achieving Timing Closure in FPGA Designs Workshop
by Admin on 06-12-2025 at 1:37 pm

Achieving Timing Closure in FPGA Designs Workshop

Do you find it challenging to close timing in your FPGA design? This workshop will guide you through leveraging AMD Vivado’s tools, optimizing your design, and applying best practices for static timing analysis to achieve reliable timing closure.

Gain hands-on experience … Read More


Webinar: Maximizing RFSoC Potential with Functionality and Configurability

Webinar: Maximizing RFSoC Potential with Functionality and Configurability
by Admin on 06-12-2025 at 1:28 pm

Description

BLT, an AMD Premier Design Services Partner and Authorized Training Provider, presents this webinar.

Join us to explore the functionality and configurability of the AMD Zynq UltraScale+ RFSoC. With the RFSoC, configuring data converters is crucial for advanced system development, but the complexity often overwhelms… Read More


Vivado Quick Start with Versal Devices Workshop

Vivado Quick Start with Versal Devices Workshop
by Admin on 06-12-2025 at 1:11 pm

This online workshop introduces key concepts, tools, and techniques required for design and development using the AMD Vivado™ Design Suite for FPGAs, SoCs, and adaptive SoCs.

The emphasis of this course is on:

  • Introduction to designing FPGAs with the Vivado Design Suite
  • Creating a Vivado project with source files
  • Introduction
Read More

Optimization and verification wins in IoT designs

Optimization and verification wins in IoT designs
by Don Dingee on 08-17-2016 at 4:00 pm

Designers tend to put tons of energy into pre-silicon verification of SoCs, with millions of dollars on the line if a piece of silicon fails due to a design flaw. Are programmable logic designers, particularly those working with an SoC such as the Xilinx Zynq, flirting with danger by not putting enough effort into verification?… Read More


One FPGA synthesis flow for different IP types

One FPGA synthesis flow for different IP types
by Don Dingee on 05-06-2016 at 4:00 pm

Both Altera and Xilinx are innovative companies with robust ecosystems, right? It would be a terrible shame if you located the perfect FPGA IP block for a design, but couldn’t use it because it was in the “wrong” format for your preferred FPGA. What if there were a way around that?

There is a compelling argument to use each FPGA vendor’s… Read More


High Level Synthesis. Are We There Yet?

High Level Synthesis. Are We There Yet?
by Paul McLellan on 06-16-2015 at 7:00 am

High level synthesis (HLS) seems to have been part of the backdrop of design automation for so long that it seems to be one of those things that nobody notices any more. But it has also crept up on people and gone from interesting technology to keep an eye on to getting genuine adoption. The first commercial product in the space was behavioral… Read More


New Vivado release goes from Lab to UltraScale

New Vivado release goes from Lab to UltraScale
by Don Dingee on 05-06-2015 at 1:00 am

Xilinx users will welcome the brand-new release of Vivado Design Suite 2015.1. For openers, device support for the latest FPGAs in the UltraScale family – XCVU440, XCVU190, and XCVU125 – has been added in the release, and early access code for the XCVU160 is available from a local Xilinx FAE. Installation has been streamlined, … Read More


Xilinx’s 16nm UltraScale+ FPGA is Revolutionary

Xilinx’s 16nm UltraScale+ FPGA is Revolutionary
by Luke Miller on 03-01-2015 at 7:00 am

Well a very belated Happy New Year dear reader. I must admit, it has been a very long winter and it has caused the Miller’s to rethink this vital question. “What in the world are we doing living in NY”. So we are moving, and hopefully this is my last ‘real’ winter as we headed down south. To perhaps alleviate some of the winter blues from … Read More


New Vivado Release. And a Competition!

New Vivado Release. And a Competition!
by Paul McLellan on 12-29-2014 at 5:00 pm

It is not entirely clear what Xilinx is these days. Of course it is an FPGA company. If you hear the word FPGA then I bet Xilinx is the first thing you think of. But what Xilinx ships these days is a far cry from the type of device it created when it was starting, where FPGAs were largely used to vacuum up all the glue logic around the processors… Read More