Lam- in line qtr but guides above street over near term. As with ASML, foundry is driver with subdued memory, The Math implies biz peaking-Looking for DRAM in 2017.
Lam reported another great, record quarter, more or less in line with expectations with revenues coming in at $1.632B and shipments of $1.708B, generating EPS of $1.81.… Read More
ASML reported a quarter that was slightly below expectations coming in at Euro 1.815B in revenues and Euro 0.93 EPS. Orders were a bit soft at Euro 1.4B but well within the normal quarterly variation of a lumpy business. Euro 28M was lost in a currency adjustment associated with the Hermes acquisition.
The guidance for Q4 was between… Read More
Standard cell and memory IP are key enablers for new process node availability. These two items must be in place early and be completely ready for a process node to scale to volume. Development of both leaves no room for error and they require the highest performance possible. Foundries are extremely focused on this and spend a lot… Read More
This is the second in series of interviews we will do with executives inside the fabless semiconductor ecosystem. Geoff Tate was the founding CEO of Rambus and is now CEO and co-founder of Flex Logix (embedded FPGA). This one should be of great interest due to the recent $16.7B acquisition of Altera by Intel. We all now know the importance… Read More
Once a year, during the TSMC’s Open Innovation Platform (OIP) Forum you can expect to see cutting edge technical achievements by TSMC and their partners. This year was no exception, with Open-Silicon presenting its accomplishments in implementing an HBM reference design in 16nm. It’s well understood that HBM offers huge benefits… Read More
Electronic system level (ESL) modeling for system architecture exploration is rapidly gaining momentum. The simulation performance requirements for hardware/software co-design are demanding — an abstract model for SoC IP cores is required. Typically, soft IP will include a number of model configuration parameters.… Read More
TSMC knows better than anyone the effect that variation can have at advanced process nodes. Particularly in memory designs and in standard cell designs, variation has become a very critical because of its effects on yield and because of the high-cost of compensating for it. Smaller feature sizes combined with lower voltage thresholds… Read More
The leading edge semiconductor logic landscape has in recent years collapsed to just four companies. The following is a summary of what is currently known about each company’s plans and how they compare. ASML has analyzed many logic nodes and developed a formula that normalizes processes to a “standard node”.… Read More
18 months ago Renesas announced they were prototyping their SG-MONOS eFlash on 28nm, and at the time we said it would be a couple of years before actual product. Yesterday, Renesas revealed their partner in this effort is TSMC – no surprise – and hinted things are moving, with better performance than expected but on a longer qualification… Read More
Flex Logix has been heads-down for the last several months working toward customer implementations of their EFLX reconfigurable RTL IP cores. Today, they’ve announced a family of 10 hard IP cores ready in TSMC 40ULP, and provided an update to their roadmap for us.… Read More
