S2C ships UltraScale empowering SoFPGA

S2C ships UltraScale empowering SoFPGA
by Don Dingee on 10-10-2015 at 7:00 am

Most of the discussion around Xilinx UltraScale parts in FPGA-based prototyping modules has been on capacity, and that is certainly a key part of the story. Another use case is developing, one that may be even more important than simply packing a bigger design into a single part without partitioning. The real win with this technology… Read More


What NoCs with virtual channels really do for SoCs

What NoCs with virtual channels really do for SoCs
by Don Dingee on 10-05-2015 at 7:00 am

Most of us understand the basic concept of a virtual channel: mapping multiple channels of traffic, possibly of mixed priority, to a single physical link. Where priority varies, quality of service (QoS) settings can help ensure higher priority traffic flows unimpeded. SoC designers can capture the benefits of virtual channels… Read More


The Case for Data Management Amid the Rise of IP in SoCs

The Case for Data Management Amid the Rise of IP in SoCs
by Majeed Ahmad on 09-02-2015 at 12:00 pm

In the late 1990s and early 2000s, during the adolescent days of the system-on-chip (SoC) design movement, there was a lot talk about IP and design reuse, but it was seldom put into practice. A decade later, SoC turned into a juggernaut with a tripartite alliance of chipmakers, IP suppliers and semiconductor manufacturing fabs.… Read More


Simulating to a fault in automotive and more

Simulating to a fault in automotive and more
by Don Dingee on 08-30-2015 at 12:00 pm

We’re putting the finishing touches on Chapter 9 of our upcoming book on ARM processors in mobile, this chapter looking at the evolution of Qualcomm. One of the things that made Qualcomm go was their innovative use of digital simulation. First, simulation proved out the Viterbi decoder (which Viterbi wasn’t convinced had a lot … Read More


Last line of defense for IoT security

Last line of defense for IoT security
by Don Dingee on 08-27-2015 at 12:00 pm

If I grab 10 technologists and ask what are the most important issues surrounding the Internet of Things today, one of the popular answers will be “security.” If I then ask them what IoT security means, I probably get 10 different answers. Encryption. Transport protocols. Authentication. Keying. Firewalls. Secure boot. Over-the-air… Read More


Testing Ethernet with virtual co-modeling

Testing Ethernet with virtual co-modeling
by Don Dingee on 08-24-2015 at 12:00 pm

Ethernet is suddenly a hot topic in SoC design again. The biggest news may be this: it’s not just the cloud and enterprise networks. Those are still important applications. The cloud is driving hard for more ports at 25G server and 100G switch speeds according to a recent Dell’Oro Group report. Enterprise networks are driving for… Read More


CEVA achieves first certified Bluetooth 4.2 IP

CEVA achieves first certified Bluetooth 4.2 IP
by Don Dingee on 08-18-2015 at 8:05 am

SoC designers working on chips for the IoT and wearables now have access to cutting-edge certified Bluetooth Smart technology from CEVA. At Bluetooth ASIA in Shanghai, CEVA announced the RivieraWaves Bluetooth Smart 4.2 IP Platform has achieved full certification by the Bluetooth SIG to the Bluetooth 4.2 specification using… Read More


ClioSoft SOS v7.0: Faster, Smarter and Stronger

ClioSoft SOS v7.0: Faster, Smarter and Stronger
by Majeed Ahmad on 08-07-2015 at 12:00 pm

System-on-chips (SoCs) are now everywhere, whether they are processors, microcontrollers or FPGAs, and what matters more these days is how quickly these large and complex chips adapt to the specific needs of the OEM application or the “system.” So time-to-market window is shrinking, and conversely, the use of … Read More


This is how FPGA Prototyping Works

This is how FPGA Prototyping Works
by Majeed Ahmad on 07-02-2015 at 1:00 pm

FPGA prototyping has come a long way since the late 1980s when chipmakers began using FPGA devices for building system prototypes of ASIC designs. The utility of a working FPGA prototype allows hardware designers to develop and test their systems, and it provides software developers early access to a fully functioning hardware… Read More


DDR stands for Don’t Do (Just) RTL

DDR stands for Don’t Do (Just) RTL
by Don Dingee on 06-16-2015 at 9:00 pm

In optimizing SoC design for performance, there is so much focus on how fast a CPU core is, or a GPU core, or peripherals, or even the efficiency of the chip-level interconnect. Most designers also understand selecting high performance memory at a cost sweet spot, and optimizing physical layout to clock it as fast as possible within… Read More