55DAC Trip Report Needham Opening Presentation

55DAC Trip Report Needham Opening Presentation
by Daniel Nenni on 07-04-2018 at 7:00 am

Driving into DAC on Sunday afternoon was a chore since Gay Pride week was finishing with the Gay Pride Parade. Streets were closed, traffic was crazy, and people were roller skating naked which seems wrong on so many levels. This year the opening ceremonies were in the convention center hallway which also seemed wrong. Long lines… Read More


55DAC Trip Report with Drama

55DAC Trip Report with Drama
by Daniel Nenni on 07-02-2018 at 7:00 am

This was my 35th DAC and it did not disappoint, especially when it came to the DAC Drama Department. This year DAC proved once again that it is THE place for semiconductor professionals and academics to learn and network. The big news is that Synopsys did not reserve a booth for 56DAC in Las Vegas next year which resulted in quite a bit… Read More


7nm Networking Platform Delivers Data Center ASICs

7nm Networking Platform Delivers Data Center ASICs
by Daniel Nenni on 06-26-2018 at 7:00 am

We all know IP is critical for advanced ASIC design. Well-designed and carefully tested IP blocks and subsystems are the lifeblood of any advanced chip project. Those IP suppliers who can measure up to the need, especially at advanced process nodes, will do well, absolutely.

It is interesting to note that eSilicon now has a very … Read More


Fractal Technologies Joins TSMC Open Innovation Platform EDA Alliance

Fractal Technologies Joins TSMC Open Innovation Platform EDA Alliance
by Daniel Nenni on 06-18-2018 at 7:00 am

In case you missed it, Fractal is now officially part of the TSMC EDA Alliance. Fractal Crossfire is the leading IP and Library QA tool used by TSMC and many of TSMC’s customers so this is for the greater IP good, absolutely. Fractal has also released a new white paper “Setup Generation for Fractal Crossfire” that we can talk about but… Read More


SemiWiki and SmartDV on Verification IP

SemiWiki and SmartDV on Verification IP
by Daniel Nenni on 06-06-2018 at 7:00 am

Bernard Murphy and I spent time with the SmartDV folks in preparation for the Design Automation Conference later this month. Bernard is an internationally recognized verification expert so his feedback is often sought after by emerging and leading verification companies, absolutely. Verification IP is a crowded market so … Read More


Should EDA Follow a Foundry Model?

Should EDA Follow a Foundry Model?
by Daniel Nenni on 05-28-2018 at 7:00 am

There is an interesting discussion in the SemiWiki forum about EDA and the foundry business model which got me to thinking about the next disruptive move for the semiconductor industry. First let’s look at some of the other disruptive EDA events that I experienced firsthand throughout my 30+ year career.

When I started in 1984 EDA… Read More


Worldwide Design IP Revenue Grew 12.4% in 2017

Worldwide Design IP Revenue Grew 12.4% in 2017
by Daniel Nenni on 05-11-2018 at 7:00 am

When starting SemiWiki we focused on three market segments: EDA, IP, and the Foundries. Founding SemiWiki bloggers Daniel Payne and Paul McLellan were popular EDA bloggers with their own sites and I blogged about the foundries so we were able to combine our blogs and hit the ground running. For IP I recruited Dr. Eric Esteve who had… Read More


Automotive FD-SOI Update

Automotive FD-SOI Update
by Daniel Nenni on 05-07-2018 at 7:00 am

GF FD SOI

We have been tracking automotive related articles on SemiWiki since 2015 and have published more than 300 automotive blogs thus far that have garnered more than one million views. The automotive publishing pace has picked up quite a bit lately and the number of domains reading them has increased exponentially. So yes, automotive… Read More


imec and Cadence on 3nm

imec and Cadence on 3nm
by Daniel Nenni on 04-30-2018 at 7:00 am

One of the more frequent questions I get, “What is next after FinFETs?” is finally getting answered. Thankfully I am surrounded by experts in the process technology field including Scotten Jones of IC Knowledge. I am also surrounded by design enablement experts so I really am the man in the middle which brings us to a discussion between… Read More


Webinar: Achieve High-performance and High-throughput with Intel based FPGA Prototyping

Webinar: Achieve High-performance and High-throughput with Intel based FPGA Prototyping
by Daniel Nenni on 03-19-2018 at 12:00 pm

FPGAs have been used for ASIC prototyping since the beginning of FPGAs (1980s) allowing hardware and software designers to work in harmony developing, testing, and optimizing their products. We covered the history of FPGAs in Chapter 3 of our book “Fabless: The Transformation of the Semiconductor Industry”, which includes … Read More