Custom layout productivity requires unrelenting EDA vendor focus

Custom layout productivity requires unrelenting EDA vendor focus
by Tom Dillinger on 08-05-2016 at 12:00 pm

The EDA tools industry relies upon ongoing productivity enhancements to existing products, to manage increasing SoC complexity and to address shrinking design schedules. The source of ideas for enhancements can come from a variety of sources – e.g., customer feedback, collaboration with the foundries, and features found … Read More


efabless: Think GitHub for ICs and IP

efabless: Think GitHub for ICs and IP
by Daniel Nenni on 08-02-2016 at 4:00 pm

For those of you who don’t know, GitHub is the crowdsourcing version of the defacto industry standard GIT source code management software. Currently, more than 14 million people have deposited more than 35 million software projects (mostly open-source) on GitHub making it the largest host of source code in the world.

Now think… Read More


Stressed out about Electrostatic Discharge (ESD) or Electrical Overstress (EOS)?

Stressed out about Electrostatic Discharge (ESD) or Electrical Overstress (EOS)?
by bkeppens on 07-28-2016 at 12:00 pm

Do not lose sleep worrying that your integrated circuits might fail during EOS/ESD events. Join us for the 38th annual EOS/ESD Symposium in Anaheim, CA in September. Experts on the field will address the latest research on EOS and ESD in the rapidly changing world of electronics.

As electronics continue to become commonplace in… Read More


Coming Up Next: ARM IoT ASICs!

Coming Up Next: ARM IoT ASICs!
by Daniel Nenni on 07-25-2016 at 12:00 pm

The History of ASICs is well documented in our book “Fabless: The Transformation of the Semiconductor Industry” which illustrates the earliest forms of design start driven collaboration. The history of ARM is well documented in our book “Mobile Unleashed” which illustrates an entire company culture based on design start driven… Read More


Learn How to Debug UVM Test Benches Faster – Upcoming Synopsys Webinar

Learn How to Debug UVM Test Benches Faster – Upcoming Synopsys Webinar
by Bernard Murphy on 07-14-2016 at 4:00 pm

UVM for developing testbenches is a wonderful thing, as most verification engineers will attest. It provides abstraction capabilities, it encapsulates powerful operations, it simplifies and unifies constrained-random testing – it has really revolutionized the way we verify at the block and subsystem level.

However great… Read More


Artificial Intelligence is Everything!

Artificial Intelligence is Everything!
by Daniel Nenni on 07-08-2016 at 7:00 am

My first brush with AI was a LISP class for my undergraduate degree. LISP, originated from MIT in 1958, was the language of choice for AI research and spawned a new class of computer hardware called LISP Machines in the 1980s. My first personal experience with AI was the HAL 9000 system from the 2001 Stanley Kubrik movie Space Odyssey.… Read More


STT-MRAM – Coming soon to an SoC near you

STT-MRAM – Coming soon to an SoC near you
by Tom Dillinger on 07-05-2016 at 4:00 pm

An increasing percentage of SoC die area is being allocated to memory arrays, as applications require more data/instruction storage and boot firmware. Indeed, foundries invest considerable R&D resources into optimizing their array technology IP offerings, often with more aggressive device features than used for other… Read More


eSilicon Offers Free Semiconductor IP For Universities!

eSilicon Offers Free Semiconductor IP For Universities!
by Daniel Nenni on 06-27-2016 at 7:00 am

It is easy to forget the importance of academia’s role in the semiconductor ecosystem but it is important not to. If you look at the DNA of the semiconductor industry you will see how dependent we are on academic research for innovation and the necessary disruption that keeps us all gainfully employed. FinFETs are the first things… Read More


Semiconductor IP QA Standards Get a Boost at #53DAC

Semiconductor IP QA Standards Get a Boost at #53DAC
by Daniel Payne on 06-22-2016 at 12:00 pm

At the #53DAC earlier this month held in Austin, Texas I met up with Renee Donkers, the founder of Fractal Technologies. His company has been focused on improving the quality of semiconductor IP cells through the use of automated checking software. The highest area of growth in EDA as measured by the ESD Alliance is in the reusable… Read More


Design for the System Age

Design for the System Age
by Bernard Murphy on 06-17-2016 at 7:00 am

Of late, it has become painfully obvious that the value of electronics is in the system. And since systems demand continuing improvement, increasing performance and decreasing cost (once partially guaranteed by semiconductor process advances) is now sought through algorithm advances – witness the Google TPU and custom… Read More