Just because it seems that the likes given to: Interface Protocols, USB3, HDMI, MIPI… the winner and losers in 2011 were numerous, I decided to count it.
Twenty-four likes received, in 11 Linkedin groups (see below), that’s good! Very goos! Thanks to all of you… And most probably thanks to IPNESTfor the quality of the… Read More
Hardware designers use complex EDA tool flows that have collections of underlying binary and text files. Keeping track of the versions of your IC design can be a real issue when your projects use teams of engineers. ClioSoft has been offering HCM (Hardware Configuration Management) tools that work in the most popular flows of: … Read More
If you are doing transistor-level IC design then you’ve probably come up against questions like:
In the old days we would hold up the old and new versions of the schematics or IC layout and try to eye-ball what had changed. Now we have an automated… Read More
I met with Jeff Wilson, Product Marketing Manager at Mentor in the Calibre product group to learn more about Smart Fill versus Dummy Fill for DFM flows. Jeff works in the Wilsonville, Oregon office and we first meet at Silicon Compilers back in the 1990’s.
Dummy Fill
This diagram shows an IC layout layer on the left as originally… Read More
Richard Goering is well-known from his editorial days at EE Times (going back some 25 years), now at Cadence he blogs at least once a week on EDA topics that touch Cadence tools.
Before DAC he talked with Srinath Anantharaman about how Cadence tools work together with ClioSoft tools to keep IC Design Data Management Simple.
Through… Read More
In my rush on Wednesday at DAC I had almost over-looked the last two companies I talked with: Invarian and AnaGlobe. These last two I had hand-written notes on paper, so I just got to the bottom of my inbox tonight to write up the final trip reports.
Invarian
Jens Andersen and Vladimir Schellbach gave me an overview of tools that perform… Read More
Intro
Show me what has changed in my RTL or Schematic since the last time I looked. This task is now automated by Cliosoft with their new hierarchical tool called Visual Design Difference (VDD). Srinath showed me what was new for DAC.
Srinath Anantharaman
Notes
LSI, STMicro – use DesignSync for their DM but use VDD for seeing visual… Read More
The 48[SUP]th[/SUP] Design Automation Conference (DAC) is now upon us. DAC is billed as “the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions” for which I would have to agree with 100%.
The first DAC I attended was in 1984, Albuquerque New Mexico, which was one of the first to allow … Read More
Introduction
Cadence and ClioSoft made a webinar recently and I’ll summarize what I learned from it.
What’s New from Cadence in Virtuoso 6.1.5
Introduction
Today Cadence announced at the Embedded Systems Conference something of interest to systems designers.
What’s New?
The Rapid Prototyping Platform and Virtual System Platform are what’s new, and they intend to enable and automate concurrent hardware and software development. I can remember Mentor… Read More
