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IBM has announced the development of a 2nm process.
IBM Announcement
What was announced:
- “2nm”
- 50 billion transistors in a “thumbnail” sized area later disclosed to be 150mm2 = 333 million transistors per millimeter (MTx/mm2).
- 44nm Contacted Poly Pitch (CPP) with 12nm gate length.
- Gate All Around (GAA), there are several ways
…
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At the SPIE Advanced Lithography Conference in February 2021, Regina Freed of Applied Materials gave a paper: “Module-Level Material Engineering for Continued DRAM Scaling”. Applied Materials provided me with the presentation and was kind enough to set up an interview for me with Regina Freed.
I also spoke to Regina Freed last… Read More
There are a lot of articles out right now discussing a possible IPO for Kioxia or sale of the company with Western Digital (WD) and Micron Technology (MT) mentioned as possible acquirers. Kioxia and WD have a partnership for Flash Memory and on March 18th WD gave a presentation on the state of their partnership and what they see as their… Read More
Intel’s IDM 2.0by Scotten Jones on 03-24-2021 at 4:00 amCategories: Foundries, Intel
In January I presented at the ISS conference a comparison of Intel’s, Samsung’s and TSMC’s leading edge offerings. You can read a write-up of my presentation here.
With the problems going on at Intel, that article generated a lot of interest in the investment community, and I have been holding a lot of calls with analysts who are trying… Read More
At the SPIE Advanced Lithography Conference held in February, ASML presented the latest information on their Deep Ultraviolet (DUV) and Extreme Ultraviolet (EUV) exposure systems. I recently got to interview Mike Lercel of ASML to discuss the presentations.
DUV
Despite all the attention EUV is getting, most layers are still… Read More
Semiconductor sales in 2020 were $439.0 billion, up 6.5% from $412.3 billion in 2019, according to World Semiconductor Trade Statistics (WSTS).
We at Semiconductor Intelligence have been tracking the accuracy of semiconductor market forecasts from various sources for several years. We look at publicly available projections… Read More
I was asked to give a talk at the 2021 ISS conference and the following is a write up of the talk.
The title of the talk is “Logic Leadership in the PPAC era”.
The talk is broken up into three main sections:
- Background information explaining PPAC and Standard Cells.
- A node-by-node comparisons of companies running leading edge logic
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Understanding Intel’s future means understanding Intel’s past
Yes, there are two paths you can go by, but in the long run. There’s still time to change the road you’re on.
Intel is at a crossroad. The road they have been on since inception, and the road that has differentiated them from the rest of the pack… Read More
The industry recently concluded a series of technology events for the all the major foundries. Done as virtual events this year, each one provided a significant update on technology platforms, roadmaps and ecosystem partnerships. These events are quite valuable to chip design teams who need to be aware of the latest in process,… Read More
Seeking Alpha just published an article about Intel and Samsung passing TSMC for process leadership. The Intel part seems to be a theme with them, they have talked in the past about how Intel does bigger density improvements with each generation than the foundries but forget that the foundries are doing 5 nodes in the time it takes… Read More