BDA Introduces High-Productivity Analog Characterization Environment (ACE)

BDA Introduces High-Productivity Analog Characterization Environment (ACE)
by Daniel Nenni on 05-19-2013 at 7:45 pm

Last week Berkeley Design Automation introduced a new Analog Characterization Environment (ACE) – a high-productivity system to ensure analog circuits meet all specifications under all expected operational, environmental, and process conditions prior to tapeout.

While standard cell characterization and memory characterization… Read More


MOS-AK/GSA Munich Workshop

MOS-AK/GSA Munich Workshop
by Daniel Nenni on 04-29-2013 at 4:06 pm

The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, completed its annual spring compact modeling workshop on April 11-12, 2013 at the Institute for Technical Electronics, TUM, Munich. The event received full sponsorship from leading industrial partners including MunEDA and Tanner EDA.… Read More


Robustness, Reliability and Yield at DAC

Robustness, Reliability and Yield at DAC
by Daniel Payne on 06-26-2012 at 8:15 pm

On Wednesday at DAC I met with Bob Slee, distributor and Michael Siu, AE for MunEDA to get an update on what’s new. MunEDA has EDA software for:

  • Schematic porting
  • Nominal circuit analysis
  • Nominal circuit optimization
  • Statistical circuit analysis
  • Statistical circuit optimization
  • IP porting
  • Circuit model generation

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Nanometer Circuit Verification Forum

Nanometer Circuit Verification Forum
by Daniel Nenni on 08-29-2011 at 2:33 pm

Image RemovedVerifying circuits on advanced process nodes has always been difficult, and it’s no easier with today’s nanometer CMOS processes. There’s a great paradox in nanometer circuit design and verification. Designers achieve their greatest differentiation when they implement analog, mixed-signal,… Read More