Organizing Data is First Step in Managing AMS Designs

Organizing Data is First Step in Managing AMS Designs
by Don Dingee on 09-14-2016 at 4:00 pm

Efficient collaboration is essential to meeting tight chip design schedules. In analog and mixed signal (AMS) design, collaboration has many facets. Design tools are usually specific to roles, and handoffs are numerous, especially when moving a design to a foundry. … Read More


Customized PMICs with OTP in automotive and IoT

Customized PMICs with OTP in automotive and IoT
by Don Dingee on 08-24-2016 at 4:00 pm

Power. Every device needs it. Managing it properly can make all the difference between a device people enjoy using and one that is more hassle than it is worth. What happens between the battery and the processor is the job of the power management integrated circuit (PMIC).

Why are PMICs gaining so much attention? Increased power … Read More


Webinar Alert – Helping Mixed Signal not be Mixed Up

Webinar Alert – Helping Mixed Signal not be Mixed Up
by Don Dingee on 08-10-2016 at 4:00 pm

Today’s profound statement: “don’t fall in love with your tools, figure out the biz process change first.” Mixed-signal SoC designers are having ample challenges with their design process and are in need of design management, but don’t want another tool to do it.… Read More


One transistor for the future of mmWave?

One transistor for the future of mmWave?
by Don Dingee on 08-03-2016 at 4:00 pm

We’ve heard recently from several sources that millimeter wave radios, once the exclusive realm of defense and satellite use, are now finding homes in applications such as automotive radar and 5G networks. Therein lies a significant opportunity for digital design: moving frequency conversion and filtering from the analog … Read More


Synopsys’ New Circuit Simulation Environment Improves Productivity — for Free

Synopsys’ New Circuit Simulation Environment Improves Productivity — for Free
by Pawan Fangaria on 02-07-2016 at 12:00 pm

When technology advances, complexities increase and data size becomes unmanageable. Fresh thinking and a new environment for automation are needed to provide the required increase in productivity. Specifically in case of circuit simulation of advanced-node analog designs, where precision is paramount and a large number… Read More


Mass customization coming to MEMS?

Mass customization coming to MEMS?
by Don Dingee on 12-18-2015 at 10:00 am

With the industry abuzz about the Apple purchase of a Maxim Integrated fab as a potential R&D facility for MEMS design, it begs the question: is creating a MEMS device that easy?

MEMS technology is approaching the same fork in the road where digital design encountered LSI four decades earlier. … Read More


Optimizing power for wearables

Optimizing power for wearables
by Bernard Murphy on 12-06-2015 at 4:00 pm

I was at the Cadence front-end summit this week; good conference with lots of interesting information. I’ll start with a panel on optimizing power for wearables. Panelists were Anthony Hill from TI, Fred Jen from Qualcomm, Leah Clark from Broadcom and Jay Roy from Cadence. Panels are generally most entertaining when the panelists… Read More


Automotive MCU code fault-busting with vHIL

Automotive MCU code fault-busting with vHIL
by Don Dingee on 09-30-2015 at 7:00 pm

With electronic and software content in vehicles skyrocketing, and the expectations for flawless operation getting larger, the need for system-level verification continues to grow. Last month, we looked at a Synopsys methodology for virtual hardware in the loop, or vHIL… Read More


Can FD-SOI Change the Rule of Game?

Can FD-SOI Change the Rule of Game?
by Pawan Fangaria on 06-18-2015 at 12:00 pm

It appears so. Why there is so much rush towards FD-SOI in recent days? Before talking about the game, let me reflect a bit on the FD-SOI technology first. The FD-SOI at 28nm claims to be the most power-efficient and lesser cost technology compared to any other technology available at that node. There are many other advantages from… Read More


Verilog-AMS connects T-SPICE and Riviera-PRO

Verilog-AMS connects T-SPICE and Riviera-PRO
by Don Dingee on 12-20-2014 at 7:00 am

With advances in available IP, mixed signal design has become much easier. Mixed signal verification on the other hand is becoming more complicated. More complexity means more simulation, and in the analog domain, SPICE-based techniques grinding away on transistor models take a lot of precious time. Event-driven methods like… Read More