Silicon Measurement Data Gives Insights to Using Metal Fill With Inductors

Silicon Measurement Data Gives Insights to Using Metal Fill With Inductors
by Tom Simon on 08-27-2014 at 4:00 pm

Metal fill requirements for inductors are now a fact of life. Fill has long been seen as detrimental to device performance due to parasitic capacitance. The necessity of fill arises from the need to ensure planarization of dielectric layers by using chemical mechanical polishing. Without adequate fill, areas of the chip can suffer… Read More