If it has escaped your notice that power management on SoCs is important then you need to get out more. Increasingly, the complexity of the interconnect between the various processors, memories, offload processors, devices, interfaces and other blocks means that the best way to implement it is to use a network on chip (NoC). But… Read More
At the Jasper Users’ Group, Alex Netterville of ARM presented about how ARM are using formal on an unannounced processor code-named Pelican. Don’t read the presentation trying to find out information about Pelican itself, there isn’t any. That wasn’t the topic. Alex has been using formal approaches… Read More
In today’s world of semiconductor design with SoCs having complex IPs, hardware and software working together on a single chip, it’s hard to imagine a system without embedded software into it. But it is easy to guess how difficult it would be to test that hardware and software embedded system. And often there is limited window of … Read More
2.5x ROI vs simulation. 25% of bugs found for only 10% of the overall verification cost. 36% of bugs in a current CPU project. These impressive results for formal analysis are what ARM’s Laurent Arditi reported at JUG 2013 after painstaking recording of metrics over several production programs.
As you can see from the above graph,… Read More
If I had to sum up opening day at ARM TechCon 2013 in one word it would be “crowded”. More than twice as many people attended as last year with 6,500 preregistered. The opening keynote was “The New Style of IT” pimping the HP Moonshot systems, but it could have just as easily been called “Why Intel Stock is Dead Money”,… Read More
I was at ARM TechCon earlier this week, and attended Simon Segars (the CEO of ARM for the last 4 months) keynote speech that opened the second day. A theme of his speech was that just as innovation continues to happen in so-called mature industries like automobiles, the same will happen in mobile. One particular area of focus for ARM… Read More
I am at ARM TechCon today. One interesting presentation was made jointly between Samsung, Cadence and ARM themselves about developing physical libraries (ARM), a tool flow (Cadence) and test chips (Samsung). It was titled Samsung ARM and Cadence collaborate on the silicon-proven world first 14-nm FinFET Cortex-A7 ARM CPU and… Read More
Altera announced in February that they would be using Intel as a foundry at 14nm. Historically they have used TSMC. Then in June they announced the Stratix 10 family of FPGAs that they would build on the Intel process. At the Globalpress summit in May I asked Vince Hu about their processor strategy. Here is what I wrote about itat the… Read More
SoC designers are attracted to ARM as an IP provider because of their popular offerings and growing ecosystem of EDA partners like Carbon Design Systems. At the upcoming ARM Techcon on October 31 this week in Santa Clara you’ll have an opportunity to hear a joint presentation from ARM and Carbon Design Systems on: Getting … Read More
This tutorial describes how analog IP is becoming more important in any power management strategy and shows the major analog building blocks to manage power and temperature in a SoC on leading edge technology nodes.
The tremendous demand for high-performance computing devices has led to aggressive technology scaling, allowing… Read More
