How to Develop Accurate Yet High Performance Models

How to Develop Accurate Yet High Performance Models
by Pawan Fangaria on 01-13-2014 at 12:00 pm

In today’s environment of semiconductor design, SoCs are crammed with various IPs with multiple functionalities and processors integrated together. In such an event it has become necessary to model the system and verify on Virtual Platform before getting into actual design and fabrication. And that requires modelling of each… Read More


A Brief History of Andes Technology

A Brief History of Andes Technology
by Paul McLellan on 01-06-2014 at 4:47 pm

I like to call Andes Technology the biggest microprocessor IP company you’ve never heard of. I wrote about themback in October when I sat down with them during the Linley Microprocessor Conference. Part of the reason you have never heard of them is that they are based in Taiwan and most of their business is in Taiwan and China.… Read More


Taming The Interconnect In Real World For SoCs

Taming The Interconnect In Real World For SoCs
by Pawan Fangaria on 12-13-2013 at 1:30 pm

Interconnect plays a significant role in the semiconductor design of a SoC; if not architected and handled well, it can lead to an overdesigned SoC impacting on its power, performance and area. Since a SoC generally contains multiple IPs requiring different data paths to satisfy varying latency and performance cycles, it has … Read More


A Brief History of ARM Holdings

A Brief History of ARM Holdings
by Daniel Nenni on 12-07-2013 at 12:00 pm

It was on 26th April 1985 (at 3pm to be precise) that the very first ARM silicon sprang in to life – it was a 25K transistor design implemented in 3um technology with just 2 layers of metal.

However back then the “A” in ARM stood for Acorn – ARM the company had yet to be formed. Acorn sold computers to schools and so cost… Read More


Cadence & ARM Optimize Complex SoC Performance

Cadence & ARM Optimize Complex SoC Performance
by Pawan Fangaria on 12-03-2013 at 3:00 pm

Now a day, a SoC can be highly complex, having 100s of IPs performing various functionalities along with multi-core CPUs on it. Managing power, performance and area of the overall semiconductor design in the SoC becomes an extremely challenging task. Even if the IPs and various design blocks are highly optimized within themselves,… Read More


Social Media at ARM

Social Media at ARM
by Daniel Payne on 11-26-2013 at 3:27 pm

The number one semiconductor IP company in the world is ARM, and they have really figured out how to use social media in a big way to communicate with and listen to their customers. When you first visit the Home page for ARM there are four social media icons displayed in monochrome underneath the menu bar. As you hover over the icons (Twitter,… Read More


5 Rules of Power Management Using NoCs

5 Rules of Power Management Using NoCs
by Paul McLellan on 11-18-2013 at 4:30 pm

If it has escaped your notice that power management on SoCs is important then you need to get out more. Increasingly, the complexity of the interconnect between the various processors, memories, offload processors, devices, interfaces and other blocks means that the best way to implement it is to use a network on chip (NoC). But… Read More


The Pelican Has Landed: Formal on an Unannounced ARM Processor

The Pelican Has Landed: Formal on an Unannounced ARM Processor
by Paul McLellan on 11-10-2013 at 3:00 pm

At the Jasper Users’ Group, Alex Netterville of ARM presented about how ARM are using formal on an unannounced processor code-named Pelican. Don’t read the presentation trying to find out information about Pelican itself, there isn’t any. That wasn’t the topic. Alex has been using formal approaches… Read More


Debugging Complex Embedded System – How Easy?

Debugging Complex Embedded System – How Easy?
by Pawan Fangaria on 11-08-2013 at 9:00 am

In today’s world of semiconductor design with SoCs having complex IPs, hardware and software working together on a single chip, it’s hard to imagine a system without embedded software into it. But it is easy to guess how difficult it would be to test that hardware and software embedded system. And often there is limited window of … Read More


Using Formal to Find Bugs in ARM Microprocessors

Using Formal to Find Bugs in ARM Microprocessors
by Paul McLellan on 11-01-2013 at 12:35 am

2.5x ROI vs simulation. 25% of bugs found for only 10% of the overall verification cost. 36% of bugs in a current CPU project. These impressive results for formal analysis are what ARM’s Laurent Arditi reported at JUG 2013 after painstaking recording of metrics over several production programs.


As you can see from the above graph,… Read More