Tag: 3nm

TSMC 2026 China Technology Symposium

TSMC 2026 China Technology Symposium
by Admin on 04-29-2026 at 12:50 am

Join us to get the latest on:

  • TSMC’s industry-leading HPC, Smartphones, IoT, and Automotive platform solutions
  • TSMC’s advanced logic technology progress on 3nm, 2nm, A16, A14 processes and beyond
  • TSMC 3DFabric® advanced silicon stacking and packaging technology advancement on TSMC-SoIC®, InFO, CoWoS®, and TSMC-SoW™
  • TSMC’s
… Read More
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What is the 3nm Pessimism Wall and Why is it An Economic Crisis?

What is the 3nm Pessimism Wall and Why is it An Economic Crisis?
by Mike Gianfagna on 02-20-2026 at 8:00 am
Categories: ClockEdge, EDA

What is the 3nm Pessimism Wall and Why is it An Economic Crisis?

Chip design is getting more difficult as technology advances. Everyone knows that. A lot of the discussion around these issues tends to focus on the demands posed by massive AI workloads and the challenges of shifting to heterogeneous multi-die design. While these create real problems, there is an underlying effect that is making… Read More

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Alchip’s Technology and Global Talent Strategy Deliver Record Growth

Alchip’s Technology and Global Talent Strategy Deliver Record Growth
by Kalar Rajendiran on 05-20-2025 at 10:00 am
Categories: 3D IC, AI, Alchip, Chiplet, FinFET, GAA, IP, Semiconductor Services, TSMC
1 Comment

Alchip TSMC 2nm N2

Alchip Technologies Ltd., a global leader in high-performance computing (HPC) and artificial intelligence (AI) ASIC design and production services, continues its trajectory of rapid growth and technical leadership by pushing the boundaries of advanced-node silicon, expanding its global design capabilities, and building… Read More

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IEDM 2025 – TSMC 2nm Process Disclosure – How Does it Measure Up?

IEDM 2025 – TSMC 2nm Process Disclosure – How Does it Measure Up?
by Scotten Jones on 02-10-2025 at 6:00 am
Categories: Foundries, TechInsights, TSMC
14 Comments

Figure 1

Initial thoughts

At IEDM held in December 2024, TSMC presented: “2nm Platform Technology featuring Energy-efficient Nanosheet Transistors and Interconnects co-optimized with 3DIC for AI, HPC and Mobile SoC Applications,” the authors are:

Geoffrey Yeap, S.S. Lin, H.L. Shang, H.C. Lin, Y.C. Peng, M. Wang, PW Wang, CP Lin, KF… Read More

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VLSI Technology Symposium – Intel describes i3 process, how does it measure up?

VLSI Technology Symposium – Intel describes i3 process, how does it measure up?
by Scotten Jones on 06-28-2024 at 6:00 am
Categories: Intel Foundry, Samsung Foundry, Semiconductor Services, TechInsights, TSMC
20 Comments

Figure 1. Process Key Dimensions Comparison.

At the VLSI Technology Symposium this week Intel released details on their i3 process. Over the last four nodes Intel has had an interesting process progression. In 2019, 10nm finally entered production with both high performance and high-density standard cells. 10nm went through several iterations eventually resulting in… Read More

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No! TSMC does not Make 90% of Advanced Silicon

No! TSMC does not Make 90% of Advanced Silicon
by Scotten Jones on 03-11-2024 at 2:00 pm
Categories: Foundries, Semiconductor Services, TechInsights, TSMC
27 Comments

Slide1

Throughout the debate on fab incentives and the Chips Act I keep seeing comments like; TSMC makes >90% of all advanced silicon, or sometimes Taiwan make >90% of all advanced silicon. This kind of ill-defined and grossly inaccurate statement drives me crazy. I just saw someone make that same claim in the SemiWiki forums and… Read More

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Pinning Down an EUV Resist’s Resolution vs. Throughput

Pinning Down an EUV Resist’s Resolution vs. Throughput
by Fred Chen on 02-21-2024 at 8:00 am
Categories: Lithography
3 Comments

Pinning Down an EUV Resist's Resolution

The majority of EUV production is on 5nm and 3nm node, implemented by late 2022. Metal oxide resists have not been brought into volume production yet [1,2], meaning that only organic chemically amplified resists (CARs) have been used instead until now. These resists have a typical absorption coefficient of 5/um [3,4], which means

… Read More
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ISS 2024 – Logic 2034 – Technology, Economics, and Sustainability

ISS 2024 – Logic 2034 – Technology, Economics, and Sustainability
by Scotten Jones on 02-19-2024 at 8:00 am
Categories: Foundries, Intel Foundry, Samsung Foundry, Semiconductor Services, TechInsights, TSMC
2 Comments

Slide4

For the 2024 SEMI International Strategy Symposium I was challenged by members of the organizing committee to look at where logic will be in ten years from a technology, economics, and sustainability perspective. The following is a discussion of my presentation.

To understand logic, I believe it is useful to understand what makes… Read More

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Analog Bits Enables the Migration to 3nm and Beyond

Analog Bits Enables the Migration to 3nm and Beyond
by Mike Gianfagna on 01-10-2024 at 6:00 am
Categories: Analog Bits, IP

Analog Bits Enables the Migration to 3nm and Beyond

The world is abuzz with 3nm and 2nm technology availability. These processes offer the opportunity to pack far more on a single die than ever before. The complex digital systems contemplated will bring new AI algorithms to life and much more. But there is another side of the technology migration story.  With all that digital processing… Read More

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Is Intel cornering the market in ASML High NA tools? Not repeating EUV mistake

Is Intel cornering the market in ASML High NA tools? Not repeating EUV mistake
by Robert Maire on 12-24-2023 at 9:00 am
Categories: Lithography, Semiconductor Advisors, Semiconductor Services
10 Comments

High NA EUV
  • Reports suggest Intel will get 6 of 10 ASML High NA tools in 2024
  • Would give Intel a huge head start over TSMC & Samsung
  • A big gamble but a potentially huge pay off
  • Does this mean $4B in High NA tool sales for ASML in 2024?

News suggests Intel will get 6 of first 10 High NA tools made by ASML in 2024

An industry news source, Trendforce, reports… Read More