I talked recently about the Intel acquisition of Altera which seems to be all about using FPGA technology to build custom accelerators for the datacenter. Some algorithms, especially in search, vision, video and so on map much better onto a hardware fabric than being implemented in code on a regular microprocessor.
So if the heart… Read More
One of the most interesting presentations that I went to was the last presentation at the Synopsys Custom Lunch (no, the lunch wasn’t custom, we all got the same, but the presentations were about custom design). Since the last presentation was by Synopsys themselves and not by a customer, it wouldn’t seem promising that it could … Read More
As I said yesterday, I’m at the imec Technology Forum (ITF) in Brussels. So what have I learned from all the people that I’ve interacted with.
There were two press releases announced at a press conference yesterday. The first was that imec was expanding its relationship with Toshiba and Sandisk. This covers bringing… Read More
Often we hear about isolated instances of excellence from various companies in the semiconductor industry which contribute significantly in building the overall ecosystem. While the individual excellence is essential, it’s rather more important how that excellence is utilized in a larger way by the industry to create a ‘value… Read More
Today the non-volatile memory (NVM) foundation is the eFuse. It is typically available for free from the foundry and is the default choice because, like Mount Everest, it is there. However, like Mount Everest it is big. It is also power hungry and slow. eFuse solutions blow the silicide on the poly line creating a change in resistance.… Read More
In the third installment of this series we discussed the status of DRAM scaling and Moore’s law. In this installment we will tackle logic. The focus will be on foundry logic.
Logic technology challenges
In the second installment of this series we discussed constant electric field scaling. As we mentioned in that installment at … Read More
The way we are seeing technology progression these days is unprecedented. It’s just about six months ago, I had written about the intense collaboration between ANSYSand TSMCon the 16nm FinFET based design flow and TSMC certifying ANSYS tools for TSMC 16nm FF+ technology and also conferring ANSYS with “Partner of the Year” award.… Read More
On-chip variation (OCV) is a major issue in timing signoff, especially at low voltages or in 20/16/14nm processes. For example, the graph below shows a 20nm inverter. At 0.6V the inverter has a delay of 2 (nominalized) units. But due to on-chip variation this might be as low as 1.5 units or as high as 3 units, which is a difference from… Read More
The Apple A9 drama continues to play out with no certainty!
At the end of the day does it matter?
Will the winner be the loser?
A Comedy, Tragedy or Love Story?
Depends on your view…
Act I Scene I…The stage is set….
We are watching an Italian Opera of a standard love triangle….
The object of desire is the rich … Read More
If you live in California anyway, with its large Asian population, you can’t have helped noticing that it was the Lunar New Year a couple of weeks ago, the start of the year of the sheep. A couple of days after the New Year, Xilinx announced their new families of what they now call FPGAs, 3D ICs and MPSoCs. But which the rest of us … Read More