There was a lot to learn at the TSMC Technical Symposium last week, in the keynotes for sure but also in the halls and exhibits. Tom Dillinger did a nice job covering the keynotes in his posts Key Take aways from the TSMC Technology Symposium Part 1 and Part 2 but there was something interesting that many people may have missed in the exhibit… Read More
10nm SRAM Projections – Who will lead
At ISSCC this year Samsung published a paper entitled “A 10nm FinFET 128Mb SRAM with Assist Adjustment System for Power, Performance, and Area Optimization. In the paper Samsung disclosed a high density 6T SRAM cell size of 0.040µm[SUP]2[/SUP]. I thought it would be interesting to take a look at how this cell size stacks … Read More
Good bye and thank you, Andy Grove!
You are gone. And with you, gone is one of the greatest leaders of our times.
In the coming days many voices will speak about the ways in which you touched countless lives, inspired a generation of engineers to create and fuel the digital revolution, and demonstrated your own brand of leadership traits in pursuit of excellence. My … Read More
Key Takeaways from the TSMC Technology Symposium Part 2
In Part 1, we reviewed four of the highlights of the recent TSMC Technology Symposium in San Jose. This article details the “Final Four” key takeaways from the TSMC presentations, and includes a few comments about the advanced technology research that TSMC is conducting.… Read More
Key Takeaways from the TSMC Technology Symposium Part 1
TSMC recently held their annual Technology Symposium in San Jose, a full-day event with a detailed review of their semiconductor process and packaging technology roadmap, and (risk and high-volume manufacturing) production schedules.… Read More
Can Qualcomm avoid repeating Motorola’s fate?
NPR had an interesting guest this morning: Edward Luce, author of “Time to Start Thinking: America in the Age of Descent”. I’m not about to turn SemiWiki into a politics blog, but there is some precedent in the technology business. I’ve caught myself saying more than once recently that “Motorola is no longer the company I worked 14… Read More
TSMC and ARM Serving up 7nm!
One thing I learned while writing the books about TSMC and ARM is that collaboration has always been at the core of both companies. They started with collaboration on day one and it is now a natural part of their business models. And the word collaboration in the fabless semiconductor ecosystem gets redefined at every process node,… Read More
SPIE – Interview with Greg Mcintyre of IMEC
One of the things I really like about major technical conferences is the opportunity to meet with people for networking and interviews. On Wednesday at the Advanced Lithography Conference I had the opportunity to interview Greg Mcinttyre, the director of advanced patterning at IMEC.
IMEC researchers are the first author on 32… Read More
Intel Adds ‘Authenticate’ Multi-Factor Security Feature
Last summer, Intel launched their 14nm, 6th Generation Core processors, code-named ‘Skylake’, alongside Microsoft’s new Windows 10 operating system. As things usually go in the enterprise world, the commercial 6th Generation of Intel’s Core vPro processors weren’t too far behind with increased security and manageability… Read More
Intel EUV Photoresist Progress and ASML High NA EUV
SPIE Days 3 and 4:
Anna Lio of Intel presented EUV resists: What’s next?
Intel wants to insert EUV at 7nm but it has to be ready and economical. Critical Dimension Uniformity (CDU), Line Width Roughness (LWR) and edge placement/stochastics are all stable on 22nm, 14nm and 10nm pilot lines.… Read More
Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet