At CDNLive, Bob Mullen of TSMC gave a presentation on their new custom FinFET flow, doing design, and verifying designs. At 16nm there are all sorts of relatively new verification problems such as layout dependent effects (LDE) and voltage dependent design rules. We had some of this at 20nm but like most things in semiconductor,… Read More
Imagine what all the DLP technology can do for you
Light has become integral part of most of the electronic devices we use today in any sphere of influence; personal, entertainment, consumer, automotive, medical, security, and industrial and so on. It’s obvious; along with IoT (Internet-of-Things) devices, the devices to illuminate and display things will play a major role… Read More
Handel Jones on FD-SOI vs FinFET
Handel Jones has a new white-paper out titled Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets. Handel has done an in-depth analysis of the wafer and die costs of the various approaches, bulk planar (what we have been doing up to now), FD-SOI and FinFET. The analysis… Read More
Sewn open: Arduino and soft electronics
As several other recent threads on SemiWiki have pointed out, the term “wearables” is a bit amorphous right now. The most recognizable wearable endeavors so far are the smartwatch and fitness band, but these are far from the only categories of interest.
There is another area of wearable wonder beginning to get attention: clothing,… Read More
Triple Patterning
As you can’t have failed to notice by now, 28nm is the last process node that does not require double patterning. At 20nm and below, at least some layers require double patterning. The tightest spacing is typically not the transistors but the local interconnect and, sometimes, metal 1.
In the litho world they call double patterning… Read More
Atmel on Tour at AT&T Park
OK, it’s not exactly AT&T park…it’s the parking lot. But they have a huge semi loaded up with lots of cool Atmel stuff to show off some of the things that their customers are doing with their microcontrollers and display technology, primarily focused on the internet of things (IoT). I went down to check it … Read More
The Technology to Continue Moore’s Law…
Can we agree about the fact that the Moore’s law is discontinuing after 28nm technology node? This does not mean that the development of new Silicon technology, like 14nm or beyond, or/and new Transistor architecture like FinFET will not happen. There will be a market demand for chips developed on such advanced technologies: mobile… Read More
Galileo, not a barber, but an Intel maker module
Words often have much deeper meaning than first meets the ear. The story behind a lyric, or a name, reveals origins, philosophical themes, and ideas beyond the obvious. A new effort from Intel conjures up just such an example – a deep reference to makers everywhere.
In a familiar refrain from Queen “Bohemian Rhapsody,” we hear two… Read More
DSP running 10 times faster at ultra-low voltage?
The LETI and STMicro have demonstrated a DSP that can hit 500 MHz while pulling just 460mV – that’s ten times better than anything the industry’s seen so far. Implemented on a 28nm FD-SOI technology, with ultra thin forward body biasing (UTFBB) capability (used to decrease Vth), this DSP can also be exercised at higher voltage when… Read More
The Infamous Intel FPGA Slide!
As I have mentioned before, I’m part of the Coleman Research Group so you can rent me by the hour to better understand the semiconductor industry. Most of the conversations are by phone but sometimes I do travel to the East Coast, Taiwan, Hong Kong, and China for face-to-face meetings. Generally the calls are the result of an event … Read More
Website Developers May Have Most to Fear From AI