IEDM Opens with a Big Picture Keynote from TSMC’s Yuh-Jier MiiThe main program for the 70th IEDM opened…Read More
How I learned Formal VerificationBing Xue is a dedicated Formal Verification Engineer at Axiomise,…Read More
Accellera 2024 End of Year UpdateFrom my viewpoint, standards organizations in semiconductor design…Read More
My vote for most compelling technology at #47DAC is 3D technology. No, I don’t mean Hollywood-style 3D, I’m talking about vertical stacked-die system on chip design. This design approach basically means putting different parts of the system on different silicon substrates, so you can use the right technology for each part, and… Read More
Where would we be without open standards? Not a good question for Steve Jobs since Apple is the open standards antichrist and one of the most successful tech companies in the history of Silicon Valley. But one of the reasons why I, along with millions of other enlightened electronic gadget consumers, avoid Apple products with a passion… Read More
According to an amended 13S filing, you now own 7.9% of Mentor Graphics, up from 6.86% disclosed on May 27th. Just what are you thinking!?!?!? Clearly you are a smart guy and you pretty much invented the game of corporate raidership, but EDA? Mentor Graphics? EDA does not need you, Mentor Graphics does not need you, I do not need you … Read More
Federal Reserve Chairman Ben Bernanke recently testified before Congress that the U.S. economy is recovering, and he predicts the nation will not experience a double-dip recession, or as I predicted a big “V” then a small “v” in my blog: China Semiconductor Bubble.
Bill Jewel from Semiconductor Intelligence agrees with Bernanke:… Read More
Overshadowing the acquisition of Denali by Cadence, Synopsys, the #2 semiconductor IP provider acquires Virage Logic, the #3 IP provider. Virage brings the #1 embedded SRAM, #1 BIST, #1 Logic Libraries, #1 DDR, #1 NVM, the ARC CPU cores and audio/video interface technology, and all the AMS IP from the NXP acquisition.
Under the… Read More
As a quick follow-up to my blog TSMC Extends Open Innovation Platform, TSMC today announced the Analog/Mixed Signal Reference Flow 1.0., another key collaborative component of TSMC’s Open Innovation Platform™.
The TSMC AMS Design Flow 1.0’s design package is integrated seamlessly on top of the 28nm interoperable process design… Read More
TSMC today extended one of the most effective semiconductor design enablement initiatives the semiconductor world has ever seen, the Open Innovation Platform (OIP). Morris Chang coined the term “OIP” himself in 2008, but the effort itself is 10+ years old with a collective cost > .5B$. My other blogs on topic include: TSMC … Read More
As mentioned in previous blogs, design enablement is a key enabler to fabless semiconductor design and manufacture, without question. The purpose of this blog (in 500 words) is to compare and contrast two very different design enablement strategies and engage the semiconductor community in a meaningful discussion.
The GlobalFoundry… Read More
In a previous blog, Black Friday and the Predicted Semiconductor Shortages, I reported that total semiconductor manufacturing capacity is shrinking as older fabs close and new ones ramp up even slower than expected, resulting in a record reduction of total wafer capacity and silicon allocation starting in 2010. DRAM shortages… Read More
Launched in April 2008, the TSMC OIP initiative is a collaborative strategy aimed at breaking down the barriers of semiconductor design enablement in order to reduce waste and increase the profitability of the industry as a whole.
The TSMC Open Innovation Platform promotes timeliness-driven innovation amongst the semiconductor… Read More
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