Immediately following Intel’s announcement that they expected Q4 revenue to come up short by $1B, Rory Read the new CEO of AMD, countered that they were on track to meet their original guidance (see article). Furthermore, “In 1Q and 2Q, maybe you see some manifestations, but I wouldn’t bet against the supply chain,”… Read More





What Will 2012 Bring The Semiconductor Ecosystem?
During my annual holiday meal with one of my favorite EDA icons some rather bold predictions were made. On his side it was more of what he would LIKE to see happen, on my side it was more of what will HAVE to happen for the semiconductor ecosystem to thrive in the coming years.
Mike Gianfagna (Viva Italia!) spent 15+ years with RCA/GE Semiconductor… Read More
Will Rising Smartphone Tide Lift Semiconductor Boats in 2012?
Memo to Self: When all else fails, return to the Smartphone Market!
The announcement by Intel earlier this week that they would come up short this quarter is a reminder that it is not growth, but very high growth that covers a Multitude of Economic Sins (many which are unforeseen). The semiconductor industry has had to endure three… Read More
Clock Design for SOCs with Lower Power and Better Specs
Dan Ganousis posted in our SemiWiki forums about a newer technique to lower the power consumed by GHz clocks on SOC designs and asked if I was interested to learn more, so we met today via WebEx. Dan is with a company called Cyclos Semiconductor, co-founded in 2006 by Marios Papaefthymiou, President and Alexander Ishii, VP of Engineering.… Read More
IC capacity utilization declined in 3Q 2011
SICAS (Semiconductor Industry Capacity Statistics) has released its 3Q 2011 data, available through the SIA at: SICAS data . Beginning with 2Q 2011 the SICAS membership list no longer includes the Taiwanese companies Nanya Technology, Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) or United Microelectronics Corporation… Read More
MEMS layout and automation
At a webinar today I listened and learned about how a tool called L-Edit can be used to layout MEMS designs plus automate the task to be more productive. I can see how the history of IC layout editing is now being repeated with MEMS because in the earliest IC layout tools we could only do manual entry of polygons, then gradually we got cells… Read More
iLVS: Improving LVS Usability at Advanced Nodes
LVS Challenges at Advanced Nodes
Accurate, comprehensive device recognition, connectivity extraction, netlist generation and, ultimately, circuit comparison becomes more complex with each new process generation. As the number of layers and layer derivations increases the complexity of devices, especially Layout Dependent… Read More
IP-SoC 2011 Trip Report: IP again, new ASSP model, security, cache coherence and more
For the 20[SUP]th[/SUP] anniversary of IP-SoC, we had about ten presentations, most being really interesting; the conference has provided globally a very good level of information, speakers coming from various places like China, Belarus, The University of Aizu (Japan), University of Sao Paulo (Brazil), Silesian and Warsaw… Read More
Learning About MEMS
My automobile has an air bag system that uses a MEMS (Micro Electro Mechanical System) sensor to tell it when to deploy, and I’ve read headlines talking about MEMS over the years so I decided it was about time to learn more by attending a Webinar on Wednesday, December 14th at 8AM Pacific Time.
The EDA company hosting the Webinar… Read More
View from the top: Ajoy Bose
I sat down yesterday with Dr. Ajoy Bose, CEO of Atrenta, to get his view of the future of EDA – looking through a high-power “spyglass” of sorts. I first met Ajoy when he was at Software & Technologies. I was then the VP of Engineering for Compass Design Automation and we were considering off-shoring some development. We eventually… Read More
Facing the Quantum Nature of EUV Lithography