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Complete Schedule of Synopsys 2013 DAC Events, Panels & Paper Participation (Free Food!)

Complete Schedule of Synopsys 2013 DAC Events, Panels & Paper Participation (Free Food!)
by Daniel Nenni on 05-19-2013 at 9:01 pm

Funny story, @ #49DAC I saw Aart with a very relaxed look on his face looking at the exhibit hall and in my mind he was thinking, “Mine, all mine!” But I digress……. Synopsys is the #1 EDA company for a reason and here is the supporting data for that hypothesis:

Synopsys is committed to accelerating Innovation… Read More


BDA Introduces High-Productivity Analog Characterization Environment (ACE)

BDA Introduces High-Productivity Analog Characterization Environment (ACE)
by Daniel Nenni on 05-19-2013 at 7:45 pm

Last week Berkeley Design Automation introduced a new Analog Characterization Environment (ACE) – a high-productivity system to ensure analog circuits meet all specifications under all expected operational, environmental, and process conditions prior to tapeout.

While standard cell characterization and memory characterization… Read More


Oasys Announces Floorplan Compiler

Oasys Announces Floorplan Compiler
by Paul McLellan on 05-19-2013 at 5:58 pm

Today Oasys announced the availability of Floorplan Compiler in the Oasys RealTime suite of physical RTL exploration and synthesis tools. This is actually a repackaging of a capability that has always been in RealTime Designer, and in fact has been an important aspect of how well RealTime Designer has performed in benchmarks … Read More


Dassault DAC Assault

Dassault DAC Assault
by Paul McLellan on 05-19-2013 at 3:25 pm

Dassault Systèmes is not a company entirely new to DAC, but with the acquisition of Matrix One (which had already acquired DesignSync) a few years ago and Tuscany Design Automation’s PinPoint last year they now have a richer portfolio to support various aspects of electronic design. By the way, Dassault is a French company… Read More


Supporting the Customer Is Everyone’s Job

Supporting the Customer Is Everyone’s Job
by Amit Varde on 05-19-2013 at 10:40 am

EDA software is quite different from off-the-shelf software. In most cases, customer requirements are unique and depend on the proprietary and complex design process, environments and standards developed and/or evolved by semiconductor design teams over a number of years. EDA software ends up being heavily customized to … Read More


CEO Interview: Jason Xing of ICScape Inc.

CEO Interview: Jason Xing of ICScape Inc.
by Randy Smith on 05-19-2013 at 12:00 am

I recently had the opportunity to interview Jason Xing, Ph.D., CEO and President of ICScape, Inc. Below is a subset of the nearly two hour long interview.

How did you first become involved in EDA?
My EDA career started in the mid-90s when I started working on my PhD thesis at the University of Illinois in Urbana-Champaign. My thesis… Read More


#50DAC: Winning in Monte Carlo!

#50DAC: Winning in Monte Carlo!
by Daniel Nenni on 05-18-2013 at 4:00 pm

One of the places you will be able to find me at the Design Automation Conference (DAC) is on the speaker panel for a Monday Tutorial – Winning in Monte Carlo: Managing Simulations Under Variability and Reliability. Having worked closely with TSMC, GLOBALFOUNDRIES, Solido Design Automation, and some of the top fabless semiconductor… Read More


SoC Optimization Using FPGA Prototyping

SoC Optimization Using FPGA Prototyping
by Daniel Payne on 05-18-2013 at 11:00 am

As an engineer I learn new concepts best by seeing a demonstration, in this case it was a demo of how to optimize SoC performance by using an ASIC prototyping debug process. SoC designers that use FPGAs to prototype their new ASIC often encounter debug issues, like:

  • Limited observability of internal nets required for debug, maybe
Read More

5G – Reality or Fiction

5G – Reality or Fiction
by Pawan Fangaria on 05-17-2013 at 7:30 pm

Early in this week, I was reading news about Samsung announcing its breakthrough 5G mmWave technology. Well, this can bring fastest smart phone in the world which could enable several functions of day-to-day life and become revolutionary. The technology is not ready for commercial use, its building blocks seems to be working.… Read More


RTL Power Estimation at DAC

RTL Power Estimation at DAC
by Daniel Payne on 05-17-2013 at 7:22 pm

If you design with ARMCores and need to estimate dynamic power early in the flow, then consider what STMicroelectronics has done with their high performance, power-efficient subsystems. Anne Merlande is a Processor Micro Architecture technical expert, and will be presenting in Booth #1346 at DACon June 4th, 2:00PM. Her topic… Read More