I hadn’t followed EDA start-up company Ausdiamuch before, so at DAC I met with Sam Appleton, CEO to find out what they are all about.
Sanjay Lall, Sam Appleton – Ausdia
… Read More
SoC Constraints, Design & Verification at DAC
Sophisticated soundscapes usher in cache-coherent multicore DSPDigital audio processing is evolving into an art…Read More
A Quick Look at Agentic/Generative AI in Software EngineeringAgentic methods are hot right now since single…Read More
Improve Precision of Parasitic Extraction for Digital DesignsBy Mark Tawfik Parasitic extraction is essential in…Read More
Perforce at DAC, Unifying Software and Silicon Across the EcosystemAs the new name reflects, chip and system…Read More
Double SoC prototyping performance with S2C’s VP1902-based S8-100As AI, HPC, and networking applications demand ever-higher…Read More
Design Test and Regression Management of SoCs
Eric Peersfounded Missing Link tools in 2008 and his company was acquiredby Methodics in 2012, so I met with him at DAC to understand how their EDA tools for Design, Test and Regression Management are used in an SoC design.
Eric Peers, Methodics… Read More
Speeding Design Closure at DAC
At DAC you can measure buzz by how many people are crowded into your booth. I saw a crowd at the Oasys booth, so stopped to take in their 10 minute overview presentation. Here’s what I learned.… Read More
Analysis of Power, Thermal, EM, IR at DAC
Most EDA start-up companies have a narrow product focus to complement existing tool flows, however Invarian is taking a much bolder approach by offering tools for:
- Power analysis
- Thermal analysis
- EM / IR analysis
- 3D Thermal analysis
Analog FastSPICE at DAC
Berkeley DA coined the phrase “Analog FastSPICE”, and I’ve been getting an update from them at DAC for several years now. In Austin I met with Paul Estradathe COO and Patrick Muyshondt.
Paul Estrada
Paul Estrada, COO (circa 2010)
… Read More
HW Prototyping and HLS at DAC
I love it when EDA companies send their engineers to DAC because I learn more of the unvarnished truth about their products. I met with Bill Thomas of Aldec to get an update on their HW prototyping boards, then two NEC engineers to learn about High Level Synthesis.
HW Prototyping
Bill Thomas, Research Engineer at Aldec
… Read More
EDA Tools from China at DAC
Last year I was surprised at DAC by an un-heard of EDA company from China, ICScape. This year I followed up and spoke with Ravi Ravikumar about what’s new with ICScape in 2013.… Read More
Validating Hard IP & Std Cell Libraries at DAC
The building blocks for every SoC are standard cell libraries that are assembled, designed and verified together. But how do we really know if all the data formats used during design are correct and consistent? To answer that question I spoke with Johan Peetersof Fractal Technologiesat DAC.
Johan Peeters, Rene Donkers
… Read More
A 3D Field Solver for Parasitic Extraction Thermal ESD Analysis
The smaller the process node the more necessary it is that you extract accurate parasitics from interconnect and 3D structures in order to analyze timing, thermal effects and ESD compliance. Silicon Frontlinehas EDA tools in all three of these categories, so I met with Dermott Lynchat DAC to get an annual update.
Dermott Lynch,… Read More
Dan Niles: Everything Changed on May 22nd
I listened to Dan Niles’s quarterly report that he does for GSA. He had a lot of the usual background data on savings rates and GDP growth, but the big story is that everything changed on May 22nd and that this will turn out to be a very significant moment. That was the day that the Fed basically announced that it would start to “taper”… Read More
TSMC N3 Process Technology Wiki