As Moore’s law keeps going, semiconductor design density on a chip keeps increasing. The real concern today is that the shrinkage in technology node has rendered the small wire geometry and gate oxide thickness (although fine in all other perspectives) extremely vulnerable to ESD (Electrostatic Discharge) effects. More than… Read More




Bringing EDA to India
Why do all three big EDA companies have user group meetings in India? The answer is to grow the EDA market in India because so many multi-national companies have engineers in India doing SoC, and IP design work. In my 35 years of IC design and EDA experience I’ve had the pleasure of working with and knowing many engineers and managers… Read More
ASICs for Bitcoin Mining!
One of the hottest areas for Application Specific Integrated Circuits today is Bitcoin mining. A good friend of mine has a son who is involved in a Bitcoin start-up so we have been discussing this at great length and I will share what I have learned thus far. Coincidently, my wife asked me about Bitcoin during our most recent walk down… Read More
A New IC Power Integrity Tool
In EDA we have come to expect that only small start-up companies create new tools, however a team at Cadencehas developed a new IC power integrity tool called Voltus from scratch. To learn more I spoke last week with KT Moore, a Group Director at Cadence. I’ve known KT for over a decade, and first met him when he was at Magma marketing… Read More
Is FD-SOI Really Faster, Cooler, Simpler?
I love the slogan associated with FD-SOI: the technology is supposed to be Faster, Cooler, Simpler. Does this slogan reflect the reality? Let’s start with Simpler. We (the semiconductor industry) have the perception that Silicon On Insulator (SOI) technology is something complex and exotic. Why? Because SOI has been used to … Read More
Xilinx Begins Shipping TSMC 20nm FPGAs!
Xilinx just announced the shipment of the first TSMC based 20 nm FPGAs, beating Altera to the punch yet again. Xilinx was also the first to ship TSMC 28nm FPGAs and will undoubtedly beat Altera to 14nm which could be the knockout punch we have all been waiting for. The Xilinx UltraScale is a new family of FPGAs that will use 20nm and 16nm… Read More
Semiconductor Fabrication Module Optimization
The growing process integration complexity at each technology node has increased development time and cost, and this trend looks to continue. There is a looming risk of delivering unrepeatable critical unit processes (or process modules) that would require revisiting development and manufacturing requalification or in … Read More
The Pelican Has Landed: Formal on an Unannounced ARM Processor
At the Jasper Users’ Group, Alex Netterville of ARM presented about how ARM are using formal on an unannounced processor code-named Pelican. Don’t read the presentation trying to find out information about Pelican itself, there isn’t any. That wasn’t the topic. Alex has been using formal approaches… Read More
IP-SoC 2013 Top Class Presentations…
… were given to an ever shrinking audience. This is IP-SoC paradox: audience has enjoyed very good presentations made by TSMC (for the first time at IP-SoC, as far as I remember), SMIC, D&R, Gartner or ST-Microelectronic, to name just a few. The event is well organized, on the morning you can listen to keynotes in the largest … Read More
Can Intel Catch Samsung? Can Anybody Catch Samsung?
As a professional conference attendee I see a lot of keynotes, some good and some bad. I saw a great one from Kurt Shuler at the SEMICO IP Impact Conference last week. Why this conference was not standing room only I do not know. Kurt’s characterization of the semiconductor industry was well worth the price of admission. I didn’t actually… Read More
Should the US Government Invest in Intel?