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SpyGlass: Focusing on Test

SpyGlass: Focusing on Test
by Paul McLellan on 09-07-2013 at 5:51 pm

For decades we have used a model of faults in chips that assumes that a given signal is stuck-at-0 or stuck-at-1. And when I say decades, I mean it. The D-algorithm was invented at IBM in 1966, the year after Gordon Moore made a now very famous observation about the number of transistors on an integrated circuit. We know that stuck-at… Read More


Why I dumped my iPhone5 for a Samsung S4!

Why I dumped my iPhone5 for a Samsung S4!
by Daniel Nenni on 09-07-2013 at 5:00 pm

A good friend and dog walking partner was on the smartphone Apple/Android fence last year so I pushed him over to Apple and the result was the infamous “8 Reasons Why I Hate My iPhone5” Blog. After months of complaining I bought him a Samsung S4 and gave his iPhone5 to my very appreciative wife so all is well that ends well, maybe.

During… Read More


Base Stations Move Away From Fixed Architecture DSP

Base Stations Move Away From Fixed Architecture DSP
by Paul McLellan on 09-06-2013 at 1:59 pm

Handsets moved away from fixed architecture DSP some time ago, driven by two main factors. Fixed architecture DSP consumed too much power to get good battery life in the smart-phone era, but the consumer air interface was changing fast: W-CDMA, HSPA, WiMax, 3G, LTE (which is actually a whole ‘spectrum’ of different… Read More


Ecosystem: ARM versus Intel

Ecosystem: ARM versus Intel
by Daniel Nenni on 09-05-2013 at 2:45 pm

Ecosystem is everything when it comes to modern semiconductor design, especially if it is mobile. The fabless semiconductor industry has been all about ecosystem since the beginning and that is why we hold supercomputers in our hands today, believe it. After the invention of the transistor in 1947, and the invention of the integrated… Read More


3D: the Backup Plan

3D: the Backup Plan
by Paul McLellan on 09-05-2013 at 1:20 pm

With the uncertainties around timing of 450mm wafers, EUV (whether it works at all and when) and new transistor architectures it is unclear whether Moore’s law as we know it is going to continue, and in particular whether the cost per transistor is going to remain economically attractive especially for consumer markets … Read More


Did you miss Cadence’s MemCon?

Did you miss Cadence’s MemCon?
by Eric Esteve on 09-05-2013 at 4:42 am

That’s too bad, as you have missed latest news about the Hybrid Memory Cube (presentation by Micron), Wide I/O 2 standard, as well as other standards like LPDDR4, eMMC 5.0, and LRDIMM,the good news is that you may find all these presentations on MemCon proceedings web site.
I first had a look at Richard Goering excellent blog: wideI/ORead More


Real Time Concurrent Layout Editing – It’s Possible

Real Time Concurrent Layout Editing – It’s Possible
by Pawan Fangaria on 09-03-2013 at 2:00 pm

Layout editing is a complex task, traditionally done manually by designers, and the layout design productivity largely depends on the designer’s skills and expertise. However, a good tool with features for ease of design is a must. Layout productivity has been an area of focus and various features are constantly being added in… Read More


Microsoft Buys Nokia

Microsoft Buys Nokia
by Paul McLellan on 09-02-2013 at 11:21 pm

OK. I was wrong. Microsoft did buy Nokia’s handset business. For $7.2B, which for a company that just wrote off nearly $1B on tablets isn’t that much. Nokia is a company that had a peak valuation of $110B although it is not clear how much of that is in the deal versus out of the deal.

Details from Reuters here.

Elop is expected… Read More


Low-Power Design Webinar – What I Learned

Low-Power Design Webinar – What I Learned
by Daniel Payne on 09-02-2013 at 7:00 pm

You can only design and optimize for low-power SoC designs if you can actually simulate the entire Chip, Package and System together. The engineers at ANSYS-Apachehave figured out how to do that and talked about their design for power methodology in a webinar today. I listened to Arvind Shanmugavel present a few dozen slides and… Read More


Must See SoC IP!

Must See SoC IP!
by Daniel Nenni on 09-02-2013 at 5:30 pm


IP is the center of the semiconductor universe and nobody knows this better than Design and Reuse. The D&R website was launched in 1997 targeting the emerging commercial semiconductor IP market. Today, with more than 15,000 IP/SOC product descriptions updated daily, D&R is the #1 IP site matching customer requirements… Read More