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                    [post_date] => 2010-04-18 22:49:00
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                    [post_content] => 
“What would you like your legacy to the world to be? Anything but Moore’s Law!”

Gordon Moore, May 2008.

Moore slightly altered the formulation of the law over time, bolstering the perceived accuracy of Moore’s law in retrospect. Most notably, in 1975, Moore altered his projection to a doubling every two years. Despite popular misconception, he is adamant that he did not predict a doubling “every 18 months”.

So clearly Moore’s law is more of an observation. Wally Rhines, Mentor Graphics CEO and my favorite presenter certainly thinks so. In his presentation to the U2U conference (that I mentioned in my previous blog), Wally feels that Moore’s empirical observation has been a useful approximation for the past 40 years due to a basic law of nature called “The learning curve”.

By definition, a learning curve is a graphical representation of the changing rate of learning for a given activity or process. Typically, the increase in retention of information is sharpest after the initial attempts and then gradually evens out, meaning that less and less new information is retained after each repetition. The learning curve can also represent at a glance the initial difficulty of learning something and, to an extent, how much there is to learn after initial familiarity.

An amazing thing, the presentation is seventy pages long and filled with an incredible amount of data, but you will never see a better data delivery system than Wally Rhines. It would be impossible to do a Wally presentation justice in a 500 word blog but here is what I learned that day:
For perspective there are:


  • 100+ billion galaxies in the night sky
  • 100+ billion stars in the milky way galaxy
  • 100+ billion transistors on a chip by 2025

Delivering 10X and beyond design improvements will require:


  • System Level Design
  • Functional Verification
  • Embedded Software
  • Physical Design and Verification


A new level of abstraction will be required for billions of transistors, 100 millions of gates, millions of lines of RTL, and hundreds of lines of TLM or C-based code. I remember the transition from schematic based design to language based (synthesis), it was a bloody battle for sure. The poor ESL guys never had a chance! Expect nothing less for System Level Design.

Verification is falling further behind and will need exponential growth in speed and capabilities to keep pace. Redundant verification must be eliminated. Emulation with transactional testbenches and mixing dynamic and formal verification will be required. Verification is one of the big challenges I see with the foundries, absolutely.

Physical Design and Verification
will continue to see new routing architecture every 2-3 nodes, parallel optimization, and full parallelization of routing. Place and route will be merged with verification to reduce/eliminate ECO routing iterations. This will be a big win for Mentor obviously since they own the verification market and are trying to move up the physical design chain.

Embedded Software
is a hot topic for Wally and of course where Mentor has made significant investments. According to Wally most of the escalating SoC design costs can be attributed to software development, which will by far outpace hardware development.

Wally is my favorite EDA CEO. He is humble, brilliant, personable, and a great speaker. No coincidence Mentor Graphics is also my favorite EDA company as it mirrors Wally. Why Dr. Walden C. Rhines does not have his own wiki page I do not know (too humble?). Rumor has it I may get a lunch with Wally sometime soon, which will certainly reinforce the notion that I blog for food.


lang: en_US

[post_title] => Moore’s (Empirical Observation) Law! [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => moores-empirical-observation-law [to_ping] => [pinged] => [post_modified] => 2019-06-14 20:51:33 [post_modified_gmt] => 2019-06-15 01:51:33 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/moores-empirical-observation-law.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [1] => WP_Post Object ( [ID] => 480 [post_author] => 28 [post_date] => 2010-04-14 22:54:00 [post_date_gmt] => 2010-04-14 22:54:00 [post_content] => As you may know I enjoy poking fun at the current state of semiconductor design and manufacture media; sloppy reporting, editors with little or no actual semiconductor experience taking corporate marketing spins on news/events and passing it along as fact.

Last week it was the EETimes parroting the Samsung foundry business press. A nice thing about being a blogger and owning your own domain is that you get to see (Google Analytics) where the views come from and which links they click on etc…. It’s like spying on your siblings, not that I ever did that. Lets just say that last week South Korea discovered my blog.

This time it is the ElectronicsWeakly top viewed article TSMC Loses 40K Wafers In Quake by one of my fellow bloggers David Manners. There was a lot of press on this topic last week but David is the only one to put a number (40,000 wafers, which is significant) on the loss, and he led with it in an article versus his blog (insert sinister music here). The question is: Where did David get a 40,000 wafer loss number? Certainly not from the official TSMC press brief:

TSMC Reports Impact From March 4 Earthquake Initial Estimate of 1.5 Days Wafer Movement Loss
Issued by: TSMC Issued on: 2010/03/04 Hsinchu, Taiwan, R.O.C. – March 4, 2010 – TSMC (TWSE: 2330, NYSE: TSM) today announced that an earthquake of magnitude 6.4 on the Richter scale occurred in south Taiwan at 8:18 am Taiwan local time on March 4. The earthquake registered on instruments at TSMC’sTainansite at magnitude 5, and was measured at TSMC’s Hsinchu site at magnitude 2.

Current assessments reports show that the earthquake had minimal impact on Hsinchu fabs. WhileTainan fabs suffered greater impact, they have gradually begun to resume production. Our initial estimate is that the earthquake caused the equivalent of 1.5 days loss of wafer movement for the company in total.



Luckily one of my siblings, that I absolutely did not spy on when I was a kid, spent his career with semiconductor equipment manufacturers and knows of such things. He says that determining actual wafer or die loss in this context is next to impossibleand here is why:

There are 300+ steps in wafer production so the impact is spread over a long wafer movement process.Average wafer movement loss is calculated as: Each Fab’s Equipment Production Time Loss (including equipment check and recalibration) + Each Fab’s Wafer Scrap (wafers removed from the movement process and not returned) / by over all wafer movement for the company (TSMC). Average wafer movement loss is expressed in “days loss of wafer movement”, which is an averaged manufacturing index, not an actual wafer scrap or revenue loss number. Bottom line, you can’t determine actual “lost wafers” from “loss of wafer movement”.



It looks like David took TSMC’s 2009 capacity of 9,995,000 8-in wafers (the 8-in. equivalent number is used to normalize 6,8, and 12-in. wafer production) and divided it out using 1.5 days of “wafer movement loss” as “lost wafer production”. My emails to David on the subject were not returned. Even funnier, I was in Taiwan that week. Funny because my Taiwan friends accuse me of bringing earthquakes with me from California. As I blogged last year, I was in Taiwan for both the July 2009 and the September 1999 earthquakes, also typhoons and an airplane crash. Pure coincidence I assure you. [post_title] => TSMC Earthquake Damage Redo [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => tsmc-earthquake-damage-redo [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:54 [post_modified_gmt] => 2019-06-15 02:36:54 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/tsmc-earthquake-damage-redo.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [2] => WP_Post Object ( [ID] => 492 [post_author] => 28 [post_date] => 2010-04-11 14:53:00 [post_date_gmt] => 2010-04-11 14:53:00 [post_content] => It was a pleasure to see the GlobalFoundries (GFI) corporate pitch at the Mentor Graphics U2U Conference last week. Wally Rhines is a tough act to follow but Mojy Chian, Senior Vice President of Design Enablement at GlobalFoundries, presented a compelling argument for a refined foundry business model. The GFI people were also nice enough to send the presentation, offer a private briefing, and honor my request for a picture of an actual 28nm test chip wafer.

I first met Mojy Chian at Conexant and again at Altera where he was Vice President of Technology managing development, infrastructure, and manufacturing (down to TSMC 40nm). I last met Mojy at lunch on St Patrick’s day. When I heard Mojy joined GlobalFoundries I knew they were absolutely serious about the business side of semiconductor design and manufacturing.

Clearly the fabless model continues to thrive at 40nm and below. Due to the cost, only a handful of semiconductor manufacturers will develop 28nm process technology. Due to the cost, only the top fabless companies will design at 28nm, so the competition for their business will be fierce. The challenge for GlobalFoundries is to differentiate from Taiwan and that was the underlying message in this presentation: “GlobalFoundries is everything TSMC is not”.

Point #1 is the basis for their name, being global and not putting your semiconductor manufacturing eggs in one regional (Taiwan) basket. TSMC’s Morris Chang responded directly to this “Global Semiconductor Company” challenge by saying that TSMC will stay in Taiwan. The major reason being the economies of scale. According to Chang, TSMC only needs to run its Taiwan wafer fabrication plants at 40% capacity to break even, compared with 80% for “global” rivals.

The Chartered Semiconductor Common Platform marketing initiative will continue under GFI. In theory, the process development is collaborative and the cost is shared amongst the members. Common Platform clearly did not work for the now defunct Chartered Semiconductor which in my opinion was an implementation problem. If GFI drives this alliance hard it will work, believe it.

Point #2 is technology and the differing versions of HKMG technology. David Lammers did an excellent write-up: Gate First or Gate Last: Technologists Debate High-k . The bottom line is that Intel and TSMC will do Gate-Last. GFI, IBM, and other Common Platform Alliance members will do Gate-First. From what I have learned, Gate-Last will favor high performance and high yield designs but will require restricted design rules (RDRs). Gate-First will favor low power and smaller die sizes but may not scale past 22nm. I see this as a major battle ground for the foundry business. My opinion, whoever wins the 28nm node will lead the foundry business for the next decade.

Point #3 is semiconductor design enablement or the EDA, IP, and Design Services ecosystem. GlobalFoundries has Common Platform, TSMC has the Open Innovation Platform. One thing that has changed with Common Platform is that GFI is providing generous financial incentives for partners and we are talking about millions of dollars in life lines to companies that have struggled for profitability. GFI also pledged not to compete with partners, which is a direct shot at TSMC who has spent 100’s of millions of dollars developing proprietary design enablement technology.


Speaking of TSMC design enablement, the annual TSMC 2010 Technology Symposiums start next week in San Jose with Morris Chang as keynote speaker. TSMC has scheduled an in-person briefing for me with Shang Yi Chiang, senior vice president of R&D, to discuss 28nm technology so next week’s blog will be a follow-up to this. [post_title] => Redefining the Semiconductor Foundry Model: Abu Dhabi versus Taiwan [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => redefining-the-semiconductor-foundry-model-abu-dhabi-versus-taiwan [to_ping] => [pinged] => [post_modified] => 2019-06-14 20:51:33 [post_modified_gmt] => 2019-06-15 01:51:33 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/redefining-the-semiconductor-foundry-model-abu-dhabi-versus-taiwan.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [3] => WP_Post Object ( [ID] => 428 [post_author] => 28 [post_date] => 2010-04-10 02:08:00 [post_date_gmt] => 2010-04-10 02:08:00 [post_content] => The 17[SUP]th[/SUP] annual TSMC Technical Symposium finished its North American tour in Boston, a day before the Boston Marathon. I would like to be clever and say the foundry business is also a marathon but it clearly is not. If you watch TSMC, the foundry business is both a sprint AND a marathon!

In contrast to the previous blog on Global Foundries, the three key points to TSMC’s success are Leadership, Technology, and Experience. Rick Cassidy, President of TSMC North America, opened the symposiums with 30 slides of analogies and perspective featuring the US Olympic Bobsledding team.

Point #1 Leadership: Clearly TSMC is the leading foundry in all aspects of the business. The question is can TSMC continue in that role for another decade? I think the answer rests squarely on point #2.


Point #2 Technology: My 30 minute meeting with Dr. Shang-Yi Chiang, Vice President of TSMC R&D, should be a blog in itself but let me say here that he is one of the smartest, humble, and most believable men I have met. The big announcement Dr Chiang made was that TSMC would skip 22nm in favor of 20nm. My first question was why? Well, for two reasons (1) TSMC continues to see a 70% shrink as the optimum scaling factor: 40nm->28nm, 28nm->20nm, 20nm->14nm, 14nm-> 10nm. (2) Is my reason: Because TSMC can, and it gives them a competitive advantage. The predominate foundry business challenge is price cutting (2[SUP]nd[/SUP] and even 3[SUP]rd[/SUP] sourcing) so making your process as sticky as possible is the ultimate business goal. High volume designs will absolutely take advantage of the performance/power/area savings of a 20nm process versus 22nm. Look for the other foundries to follow suit as they did with 45 to 40nm in order to be competitive.

My second question for Dr Chiang was why Gate-Last versus Gate-First for 28nm? TSMC actually had parallel 28nm projects: Gate-First, Gate-Last, and Poly Gate. The winner was the Gate-Last 28nm implementation coupled with Restricted Design Rules due to scalability, performance, and yield. Dr Chang also stated that there is not an area penalty using RDRs which defies my personal experience with Recommend Design Rules.


My third question was about 40nm, what really happened with yield? Dr Chiang viewed it positively as a “learning” experience which resulted in technologies and practices that will enable 28nm and below (restricted design rules). TSMC saw 40nm designs with 4 billion + single VIAs, so VIA failure was an issue. Process variation was also a major issue, which I have blogged about before:


Moore’s Law and 28nm Yield
Moore’s Law and 40nm Yield


Dr Chaing did say that 40nm is “comfortably in production” at Fab 12 and 14. Expansion projects will double TSMC 40nm capacity by the end of the year. Giga Fabs like 12 and 14 can produce 100,000+ 12 inch wafers per month! Compared to Mini Fabs (10k+) and Mega Fabs (30k+). Capacity and the ability to satisfy the high volume needs of the top fabless semiconductor companies is key, believe it. He also said 28nm is on track with risk production in Q2 2010, which puts TSMC 6 months ahead of GlobalFoundries.

Point#3 Experience:TSMC also owns this one. IDM experience and Foundry experience are two very different things. One example is semiconductor IP and how it integrates into your design. Characterized, Modeled, Silicon proven IP from TSMC itself and TSMC early access partners like Virage Logic will ease integration issues and speed wafer sales. IP such as SRAM is used as pipe cleaners for new processes, which is why Virage was the first to announce products on TSMC 28nm. Other experience examples include silicon proven PDKs, Reference Design Kits and Flows.

This is my favorite Rick Cassidy slide, tight integration indeed:

My second favorite slide: mega fab costs are comparable to a Nimitz Class Aircraft carrier, minus the aircraft ($5B+). The question is, how many companies will be able to afford a fleet of aircraft carriers in the coming years, TSMC and?
 [post_title] => Redefining the Foundry Model: TSMC versus GlobalFoundries [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => redefining-the-foundry-model-tsmc-versus-globalfoundries [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:53 [post_modified_gmt] => 2019-06-15 02:36:53 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/redefining-the-foundry-model-tsmc-versus-globalfoundries.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [4] => WP_Post Object ( [ID] => 475 [post_author] => 28 [post_date] => 2010-03-31 22:05:00 [post_date_gmt] => 2010-03-31 22:05:00 [post_content] => My visit to Taiwan last week was very encouraging. No earthquake, no typhoon, and both TSMC and UMC again posted record financial results, giving a peek into what 2011 has in store for us semiconductor professionals around the world.

A transcript from the TSMC earnings call can be foundhere, the UMC transcript is here. The TSMC transcript is 19 pages long so let me save you some time with the key financial points:


  • TSMC’s net sales reached NT $412.3 billion ($13.4730 billion USD), up 6.9% from Q2 and up 24.8% from the same period a year ago.
  • Wafer shipments were 3.19 million 8 inch equivalent wafers, up 9% from the prior quarter and up 30.5% from the year ago quarter.
  • Operating margin was 38.4%, down 2% points sequentially, but up 2.8% points compared with year ago quarter.
  • EPS for Q3 reached NT$1.81, ROE was 36.5%.
  • Q3 gross margin was 50%, up by 0.5% points from 49.5 in Q2, mainly due to continued cost improvements.
  • Operating expense increased NT$1.6 billion from Q2, primarily due to a higher level of development activities for our 28 nanometer and 20 nanometer technologies, and also a higher opening expense for our Fab 12.
  • Ended Q3 with $5B+ USD in cash and short term investments


“Our mission is simply to be the technology and capacity provider of the global logic IP industry for years to come. We want to be the technology and capacity provider of the largest IP industry for years to come.”
Morris Chang was again on the conference call. Morris resumed as TSMC CEO June 2009 after passing the CEO baton to Rick Tsai in July 2005. I really am glad Morris is back at TSMC! According to Morris:


  • Q3 was a historical record in revenue dollars, in gross margin and in net income dollars.
  • If Q4 were at the same exchange rate at Q3, then Q4 guidance would be revenue NT$111.6 billion to NT$113.7. billion which is higher than Q3 actual.
  • Gross margin percentage would be 49.5% to 51.5%, which is also higher than the Q3 actual.
  • CAPEX will be $5.5 billion this year, CAPEX will be greater in 2011.
  • 71 customer 28 nm tape outs already scheduled.
  • We are forecasting total foundry revenue growth will be 14% in 2011.


One thing that Morris said that needs clarification is on 28nm portability:

I also wanted to point out that as the 28 nanometer generation, customer designs are very difficult to port between foundries. They’re very difficult to move from one foundry to another. This is a new phenomena that did not exist even in the 45-40 generation.

It is true that TSMC 28nm designs cannot be manufactured at other foundries with little or no modifications like 40nm. TSMC 28nm designs can however be migrated to other foundries using process migration tools from Sagantec. Magma and Cadence also have migration tools (Titan ALX and Virtuoso Layout Migrate) but they both have complexity and capacity issues. Process migration is only a $10M market so I doubt Magma or Cadence will put much more effort into it. I’m currently working on 28nm migration projects with Sagantec so I know this by experience.

Communications (mobile internet) will continue to drive semiconductors in 2011 and the rest of this decade. Smartphones give people access to information and information is power. In India and China even the poorest of poor people have mobile phones. No indoor plumbing, but everyone has a mobile phone. Access to information raises the aspirations of the poor which will in turn force governments to acknowledge poverty and do something about it. The semiconductor industry is changing the world, believe it. [post_title] => TSMC 2011 Forecast and 28nm Update! [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => tsmc-2011-forecast-and-28nm-update [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:51 [post_modified_gmt] => 2019-06-15 02:36:51 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/tsmc-2011-forecast-and-28nm-update.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [5] => WP_Post Object ( [ID] => 500 [post_author] => 28 [post_date] => 2010-03-21 20:56:00 [post_date_gmt] => 2010-03-21 20:56:00 [post_content] => The 2010 ISSCC theme was all about “Sensing the Future” and was one of the most inspiring semiconductor conferences I have experienced. The halls were filled with the top names in semiconductor design and manufacture from around the world. The sessions highlighted not only technology breakthroughs (first 4G silicon), but new semiconductor applications for humanity.

The International Solid-State Circuits Conference is the foremost forum for presentation of advances in solid-state circuits and systems-on-a-chip. The Conference offers a unique opportunity for engineers working at the cutting edge of IC design and use to maintain technical currency, and to network with leading experts.”
Per my previous blogs, mobile internet devices are a leading driver of semiconductor growth. Next-generation semiconductors will enable new mobile applications that take advantage of high-speed data connections, high-performance applications, added processing capabilities, and long battery lifetime. The result being exploding data usage and a 3G wireless bottleneck.

The first functional 4G chip for high-speed communication was highlighted, a collaboration between researchers from ETH Zurich and Advanced Circuit Pursuit. In addition, researchers from CEA-LETI described a reconfigurable chip that can implement multiple wireless standards including 4G, WIMAX, 802.11n, and Cognitive Radio. Their solution provides the necessary flexibility required to interconnect to a variety of networks using many different standards. Very cool stuff.

Also unveiled were several low-power embedded processors that break through the 1 GHz barrier, enabling the next generation of smart phones and netbooks that are fast approaching PC operating speeds. Intel and ARM presented new circuits for dynamic detection and correction of timing errors to squeeze voltage margins for reliable low- power operation over 1.5GHz, while Qualcomm describes low-power-design techniques used in their upcoming 1.4GHz Snapdragon processor core.

These innovations in both cellular/wireless standard support and low-power, high-performance embedded processors will be the building blocks for the next-generation mobile devices, bringing as-yet-unseen levels of functionality and performance to the masses. Extremely cool stuff!

A late Tuesday night panel “ Semiconductor Industry in 2025 “ looked at the challenges ahead:

The historic predictability of Moore’s Law has spurred innovation and redefined how we build integrated circuits. We have developed an eco-system of specialized entities to resolve specific challenges such as Equipment Development, Foundry Services, Design, EDA, Software, and Consumer Services. While more specialization has been an undisputed trend of the past, we are beginning to see hardware companies becoming less specialized – manufacturing companies entering design, design companies entering services, to name a few. What approach will be the predominant model in 2025? More vertically-integrated companies that enable recurring revenue? Or more horizontally- integrated companies that focus on specialized innovation?

Executives from Intel, IBM, NXP, TSMC, and Mentor Graphics presented. My favorite, of course, is Wally Rhines who made an interesting point. While other industries consolidate, the semiconductor industry de-consolidates with basically the same players in different positions depending on what technology drives the semiconductor market. In the 1970’s it was memory, microprocessors in the 1980’s, fabless semiconductor companies joined the ranks of the top 25 in the 1990’s, and mobile internet enablers experienced record growth in the last 10 years.
From 2010-2025 Wally predicts a yearly:


  • Decline in cost per function (transistor) of 35%
  • 49%+ transistor increase
  • 13%+ unit increase

The 2011 ISSCC continues on the futuristic path of semiconductors: Electronics for Healthy Living – call for papers is now available. I hope to see you there.
 [post_title] => Semiconductor Industry 2025 [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => semiconductor-industry-2025 [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:49 [post_modified_gmt] => 2019-06-15 02:36:49 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/semiconductor-industry-2025.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [6] => WP_Post Object ( [ID] => 499 [post_author] => 28 [post_date] => 2010-03-07 20:49:00 [post_date_gmt] => 2010-03-07 20:49:00 [post_content] => According to the EETimes“The leading-edge foundry market is up for grabs, as several vendors have stumbled or been victims of the shakeout “. According to people who actually work with the foundries, like myself, the leading edge foundry market will continue to be dominated by TSMC and GlobalFoundries is the “dark horse”. Samsung is now and will always be an IDM, with the foundry business being a diversion at best.

The EETimes also claims that TSMC “stumbled and had yield issues at the 40-nm node.”Again not true. TSMC has more than 80% of the 40nm market with 60+ products in production. TSMC forecasts 40nm accounting for 20% of overall revenues at the end of 2010, compared to 9% in the fourth quarter of 2009. Other foundries would be lucky to stumble into numbers like that!
TSMC Fab 12 is currently capable of producing 80,000 12-inch equivalent wafers on 40nm every quarter and will double that by the end of 2010. TSMC’s other 300-mm GigaFab, Fab 14, can also be used to meet future 40nm demand.
The widely reported TSMC 40nm yield problems were focused on GPUs. GPU products are bleeding edge technologies that drive process development, including half nodes. There are (5) GPU players withmarket share: Intel, Nvidia, AMD/ATI, S3, and SiS. Intel is an IDM, the rest manufacture at TSMC. Why TSMC you ask? Because GPUs are the single most difficult product to yield and TSMC is the only foundry that can accommodate the insanely competitive GPU market.

According to Ana Hunter, Samsung Semiconductor Vice President of Foundry Services, after 4+ years of trying “Samsung’s share of the foundry business is not as big as we want, but it takes time to put the pieces in place and ramp designs.”Prior to Samsung, Hunter spent 9+ years at Chartered Semiconductor, which was bought by GlobalFoundries last year for pennies on the invested dollar. Hunter stated that “The foundry business is part of our core strategy” and highlighted 6 reasons why Samsung believes it will succeed:

[LIST=1]
  • Capacity – Samsung plans to double its production of chips for outside customers every year until it rivals market leader TSMC. ( Wow, good luck with that!)
  • Resources – Samsung is one of the few companies that has the resources to compete at the high-end of the foundry market. (Intel, IBM, TSMC, GFI….)
  • Leading Edge Technology – Samsung is ramping 45-nm technology at a time when TSMC and others are struggling in the arena. (Oh no she di’int!)
  • Leading Edge Technology part II – Samsung will be one of the first foundries to roll out a high-k/metal-gate solution. The technology will be offered at the 32- and 28-nm nodes, which will be rolled out this year. (TSMC and GFI will go straight to 28nm HKT this year)
  • Leading Edge Technology part III – Unlike rival TSMC, Samsung is using a gate-first, high-k technology, TSMC is going with gate-last. We think that gate-first is best suited for today’s needs. (I defer to TSMC on this one, they have forgotten more about the foundry business than most will ever know.)
  • Ecosystem – Samsung has put the EDA pieces in place for the design-for-manufacturing puzzle. (A puzzle analogy, really?)


    Now let me highlight 6 reasons why I believe Samsung will not succeed:

    [LIST=1]
  • Business Model – The Foundry business is services centric, the IDM business is not. This is a serious paradigm shift for Samsung.
  • Customer Diversity – Supporting a handful of customers/products is a far cry from supporting the 100’s of customers and 1,000′s of products TSMC does.
  • Ecosystem – An open ecosystem is required which includes supporting commercial EDA, Semiconductor IP, and Design Services companies of all shapes and sizes.
  • Conflict of InterestPure-play foundries will not compete with customers, Not-pure-play foundries (Samsung) will. Would you share sensitive design, yield, and cost data with your competitor?
  • China – The Chinese market represents the single largest growth opportunity for the foundry business. TSMC has a fab in Shanghai and 10% control of SMIC (#4), UMC (#2) has control of China’s He Jian (#11), and Samsung does not even speak Mandarin.
  • Competition – The foundry business is ultra competitive, very sticky, and product dumping will not get you from #9 to #1.

    Just my opinion of course. [post_title] => TSMC versus SAMSUNG [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => tsmc-versus-samsung [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:47 [post_modified_gmt] => 2019-06-15 02:36:47 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/tsmc-versus-samsung.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [7] => WP_Post Object ( [ID] => 477 [post_author] => 28 [post_date] => 2010-02-28 22:22:00 [post_date_gmt] => 2010-02-28 22:22:00 [post_content] => Last week TSMC hosted the2010 Executive Forum on Leading Edge Semiconductor Technology in Yokohama, Japan. The Senior Vice President of R&D at TSMC lectured on process development and the individual technologies for the 45/40nm, 32/28nm and 22/20nm nodes and explained the current status.

    Dr. Shang-Yi Chiang joined TSMC in July 1997 as Vice President of Research and Development (R&D). He temporarily retired from TSMC as Senior Vice President of R&D in July 2006 and returned in September 2009 to resume this position.

    Dr. Chiang, a fellow of IEEE, received his Bachelor of Science degree from National Taiwan University in 1968, his Master of Science degree from Princeton University in 1970, and his Doctorate from Stanford University in 1974, all in electrical engineering. In 2001, Dr. Chiang was chosen as one of the 50 “Stars of Asia” by BusinessWeek Magazine. This award recognizes the outstanding performance of TSMC’s R&D team under Dr. Chiang’s leadership, and his vision and strategies for continued aggressive R&D development despite the industry-wide downturn.


    The new technologies introduced for the 45/40nm process include ArF immersion exposure, the third-generation strained silicon and a low-k interlayer insulating film whose dielectric constant was lowered to 2.5. Though TSMC had chamber matching and ion implanting problems for the 45/40nm process, it has solved the problems and is now rapidly ramping the technology. The number of tape-outs have increased at a rapid rate, and half of the taped-out chips are now being mass-produced, TSMC said.

    The most important new technology for the 32/28nm process is a new gate. A SiON gate insulating film is used for the low-power type (28LP) while a high-dielectric gate insulating film and a metal gate electrode (high-k/metal gate) are used for the high-performance type (28HP) and the medium-speed, low-leakage type (28HPL).

    As a process to form the high-k/metal gate, TSMC employed the gate-gate-last process instead of the gate-first process, which the company was planning to use at first. Also, it will introduce the fourth-generation strained silicon and low-resistance Cu wiring. TSMC lowered the resistance of Cu wiring by improving the flatness of the boundary surfaces of the Cu and barrier metal to prevent electrons flowing on the surface of the wiring from scattering.

    Besides TSMC, IBM and GLOBALFOUNDRIES have initiated research projects to enable the scaling of semiconductor components to the 22 nanometer node and beyond. Back in June 2009, GlobalFoundries described an innovative technology that could overcome one of the key hurdles to advancing high-k metal gate (HKMG) transistors, enabling the next generation of mobile devices with more computing power and improved battery life.
    An interesting race indeed, the prize being the top foundry customers around the world: Qualcomm, Broadcom, Xilinx, Altera, AMD/ATI, Nvidia, Apple, etc… [post_title] => TSMC vs GlobalFoundries vs IBM [post_excerpt] => [post_status] => publish [comment_status] => closed [ping_status] => closed [post_password] => [post_name] => tsmc-vs-globalfoundries-vs-ibm [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:45 [post_modified_gmt] => 2019-06-15 02:36:45 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/tsmc-vs-globalfoundries-vs-ibm.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [8] => WP_Post Object ( [ID] => 569 [post_author] => 28 [post_date] => 2010-02-22 00:30:00 [post_date_gmt] => 2010-02-22 00:30:00 [post_content] => One may ask why in the semiconductor world would GlobalFoundries(GFI) exhibit at the Mobile World Congress last week, the world’s largest exhibition for the mobile industry. And not just exhibit, GFI turned out at en force with meeting rooms and bright orange signage declaring a mobile revolution. Why? Here is your first clue:

    2010 will usher in a new generation of consumer electronic devices. These devices will enable mobile internet access to an ever increasing amount of high speed data, real time audio, high definition video, and mobile television. Driven by smartphones, mobile internet devices are in hyper growth mode and represent the single largest consumer electronics market segment known to man. Remember, there are 6,795,200,000 people in the world that will need mobile internet devices. There are only about 1,000,000,000 smartphones in use today and they have a much shorter life cycle than a radio, TV, desktop, or even a laptop personal computer.

    As consumer electronic devices go mobile, the lines between televisions, computers, phones, cameras, browsers and operating systems disappear. Nowhere is this more illustrated than in the rapid rise of mobile consumption of the internet. According to the Quantcast 2009 Mobile Trends Report, the North American mobile web share is up 110% in 2009 (Dec ’09 vs. Dec ’08) and the global mobile web consumption share up 148% in 2009. Beginning with the iPhone in 2007, the Android in 2009, and the tablet PC onslaught in 2010, it’s a safe bet that the number of mobile internet devices will grow in numbers exponentially in the coming decade. The next question is: How can we simplify the design and implementation of mobile internet device hardware and software?

    The semiconductor industry has done an excellent job with technical standards in this regard. Inside mobile internet devices (smartphones) MIPI Specifications establish standards for hardware and software interfaces which allow consumers a choice of vendors for leading edge products. The MIPIAlliance, established in July 2003 by ARM, Nokia, STMicroelectronics and Texas Instruments, is an open membership organization for leading companies in the mobile industry that promote open interface specifications. The IEEE Industry Standards and Technology Organization (ISTO) administers the Alliance.

    Before MIPI was established designers faced multiple competing and proprietary physical-layer interfaces for any given system function. MIPI has reduced that to two-to-four physical-layer standards, with multiple protocols layered on top to cover various functions, all designed to last for multiple generations. A standards organization that actually works, how refreshing!

    A next generation MIPI physical layer, the M-PHY, was rolled out at MWC last week. The M comes from the Roman numeral 1000 to signify the 1000M-5GBit communication speed. The M-PHY is a serial interface technology with high bandwidth capabilities, targeted for mobile applications designed for good power efficiency and for a wide range of application protocols. The M-PHY provides higher bandwidths and uses fewer signal wires than the current D-PHY technology that it replaces.

    In the end, the central communications module will not necessarily be large but will include the user’s basic identity and some communications capabilities. The more challenging aspects will be supplying high-definition streaming video, loading of gigabyte wide movies (from the Internet) and “everyone, everywhere, seamless wireless connection to surrounding devices and services”. These future use model requirements point directly to the MIPI M-PHY. [post_title] => GlobalFoundries and the Mobile World Congress [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => globalfoundries-and-the-mobile-world-congress [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:44 [post_modified_gmt] => 2019-06-15 02:36:44 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/globalfoundries-and-the-mobile-world-congress.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [9] => WP_Post Object ( [ID] => 420 [post_author] => 28 [post_date] => 2010-02-09 21:31:00 [post_date_gmt] => 2010-02-09 21:31:00 [post_content] => When AMD sought to shed its costly manufacturing unit Ibrahim Ajami saw an interesting opportunity, one that will eventually bring semiconductor manufacturing to Abu Dhabi. Let’s start with the recent interview published with Ajami, the 34 year old Chief Executive Officer of Advanced Technology Investment Company (ATIC), which is owned by the Government of the Emirate of Abu Dhabi, and is the controlling shareholder of GlobalFoundries (GFI).

    GlobalFoundries wants 30% of the made-to-order chip market within three years. “Am I setting very aggressive targets? Yes,” Ajami said in a Jan 28 interview in Abu Dhabi. “We need to be a $5 billion company in the next two to three years.” A 30% share would take GlobalFoundries well past United Microelectronics Corp (UMC), making it the world’s second-largest contract manufacturer of chips after Taiwan Semiconductor Manufacturing Co (TSMC).

    Mr. Ajami also dispelled recent rumors: “ATIC won’t buy the rest of GlobalFoundries (AMD owns 34%) and the company has no interest in acquiring either United Micro or South Korea’s Hynix Semiconductor Inc.”, Ajami said. “It doesn’t fit with our strategy right now,” he said. “UMC is another foundry in Taiwan and we’re not looking to go there right now and Hynix is a memory company. Memory is not what we’re focused on right now”.

    Ajami earned his BS degree from Northeastern University in Boston in 1998 and his MBA from the University of Southern California in 2004. His semiconductor experience comes from the creation of a Silicon Valley startup called ViralSounds Inc., and he worked for Packard Bell/NEC. Ajami, associate director of the acquisitions unit of Mubadala, was tapped to become CEO of ATIC and led the $7.5 billion acquisitions of AMD manufacturing and Chartered Semiconductor that we now call GlobalFoundries.



    As I mentioned in TSMC versus GlobalFoundries Part I and Part II, GFI will compete head-to-head with TSMC in the first source semiconductor market, while UMC and SMIC are content to be second and third source semiconductor manufacturers. GFI has not been shy about their challenge to TSMC’s wafer supremacy and TSMC has responded in kind by increasing capital expenditures, increasing R&D expenses, and hiring thousands of engineers.

    During my January visit to Taiwan there was definitely excitement in the air at TSMC. The Fab lobbies were filled with job applicants, the Fab cafeterias and coffee shops were abuzz, and meetings were much harder to coordinate, a very big change from a few months ago. On a side note, the food in Fab 12 is by far the tastiest and EVA Airlines is the absolute best carrier from the US to Taiwan, but I digress.

    Whether or not GFI is a serious threat to TSMC’s foundry supremacy, TSMC is certainly using GFI’s public relations activities to motivate employees. Déjà vu when the deep pockets of the Chinese government funded SMIC. Unfortunately, as it turned out, SMIC was a sheep in wolf’s clothing. GFI on the other hand looks more like a wolf in an Armani suit. [post_title] => The GlobalFoundries Enigma [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => the-globalfoundries-enigma [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:36:42 [post_modified_gmt] => 2019-06-15 02:36:42 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/the-globalfoundries-enigma.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) ) [post_count] => 10 [current_post] => -1 [in_the_loop] => [post] => WP_Post Object ( [ID] => 502 [post_author] => 28 [post_date] => 2010-04-18 22:49:00 [post_date_gmt] => 2010-04-18 22:49:00 [post_content] =>
    “What would you like your legacy to the world to be? Anything but Moore’s Law!”

    Gordon Moore, May 2008.

    Moore slightly altered the formulation of the law over time, bolstering the perceived accuracy of Moore’s law in retrospect. Most notably, in 1975, Moore altered his projection to a doubling every two years. Despite popular misconception, he is adamant that he did not predict a doubling “every 18 months”.

    So clearly Moore’s law is more of an observation. Wally Rhines, Mentor Graphics CEO and my favorite presenter certainly thinks so. In his presentation to the U2U conference (that I mentioned in my previous blog), Wally feels that Moore’s empirical observation has been a useful approximation for the past 40 years due to a basic law of nature called “The learning curve”.

    By definition, a learning curve is a graphical representation of the changing rate of learning for a given activity or process. Typically, the increase in retention of information is sharpest after the initial attempts and then gradually evens out, meaning that less and less new information is retained after each repetition. The learning curve can also represent at a glance the initial difficulty of learning something and, to an extent, how much there is to learn after initial familiarity.

    An amazing thing, the presentation is seventy pages long and filled with an incredible amount of data, but you will never see a better data delivery system than Wally Rhines. It would be impossible to do a Wally presentation justice in a 500 word blog but here is what I learned that day:
    For perspective there are:


    • 100+ billion galaxies in the night sky
    • 100+ billion stars in the milky way galaxy
    • 100+ billion transistors on a chip by 2025

    Delivering 10X and beyond design improvements will require:


    • System Level Design
    • Functional Verification
    • Embedded Software
    • Physical Design and Verification


    A new level of abstraction will be required for billions of transistors, 100 millions of gates, millions of lines of RTL, and hundreds of lines of TLM or C-based code. I remember the transition from schematic based design to language based (synthesis), it was a bloody battle for sure. The poor ESL guys never had a chance! Expect nothing less for System Level Design.

    Verification is falling further behind and will need exponential growth in speed and capabilities to keep pace. Redundant verification must be eliminated. Emulation with transactional testbenches and mixing dynamic and formal verification will be required. Verification is one of the big challenges I see with the foundries, absolutely.

    Physical Design and Verification
    will continue to see new routing architecture every 2-3 nodes, parallel optimization, and full parallelization of routing. Place and route will be merged with verification to reduce/eliminate ECO routing iterations. This will be a big win for Mentor obviously since they own the verification market and are trying to move up the physical design chain.

    Embedded Software
    is a hot topic for Wally and of course where Mentor has made significant investments. According to Wally most of the escalating SoC design costs can be attributed to software development, which will by far outpace hardware development.

    Wally is my favorite EDA CEO. He is humble, brilliant, personable, and a great speaker. No coincidence Mentor Graphics is also my favorite EDA company as it mirrors Wally. Why Dr. Walden C. Rhines does not have his own wiki page I do not know (too humble?). Rumor has it I may get a lunch with Wally sometime soon, which will certainly reinforce the notion that I blog for food.


    lang: en_US

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  • Moore’s (Empirical Observation) Law!

    Moore’s (Empirical Observation) Law!
    by Daniel Nenni on 04-18-2010 at 10:49 pm

    “What would you like your legacy to the world to be? Anything but Moore’s Law!”
    Gordon Moore, May 2008.

    Moore slightly altered the formulation of the law over time, bolstering the perceived accuracy of Moore’s law in retrospect. Most notably, in 1975, Moore altered his projection to a doubling every two years. Despite popular misconception,… Read More


    TSMC Earthquake Damage Redo

    TSMC Earthquake Damage Redo
    by Daniel Nenni on 04-14-2010 at 10:54 pm

    As you may know I enjoy poking fun at the current state of semiconductor design and manufacture media; sloppy reporting, editors with little or no actual semiconductor experience taking corporate marketing spins on news/events and passing it along as fact.

    Last week it was the EETimes parroting the Samsung foundry business pressRead More


    Redefining the Semiconductor Foundry Model: Abu Dhabi versus Taiwan

    Redefining the Semiconductor Foundry Model: Abu Dhabi versus Taiwan
    by Daniel Nenni on 04-11-2010 at 2:53 pm

    It was a pleasure to see the GlobalFoundries (GFI) corporate pitch at the Mentor Graphics U2U Conference last week. Wally Rhines is a tough act to follow but Mojy Chian, Senior Vice President of Design Enablement at GlobalFoundries, presented a compelling argument for a refined foundry business model. The GFI people were also … Read More


    Redefining the Foundry Model: TSMC versus GlobalFoundries

    Redefining the Foundry Model: TSMC versus GlobalFoundries
    by Daniel Nenni on 04-10-2010 at 2:08 am

    The 17[SUP]th[/SUP] annual TSMC Technical Symposium finished its North American tour in Boston, a day before the Boston Marathon. I would like to be clever and say the foundry business is also a marathon but it clearly is not. If you watch TSMC, the foundry business is both a sprint AND a marathon!

    In contrast to the previous blog onRead More


    TSMC 2011 Forecast and 28nm Update!

    TSMC 2011 Forecast and 28nm Update!
    by Daniel Nenni on 03-31-2010 at 10:05 pm

    My visit to Taiwan last week was very encouraging. No earthquake, no typhoon, and both TSMC and UMC again posted record financial results, giving a peek into what 2011 has in store for us semiconductor professionals around the world.

    A transcript from the TSMC earnings call can be foundhere, the UMC transcript is here. The TSMC transcript… Read More


    Semiconductor Industry 2025

    Semiconductor Industry 2025
    by Daniel Nenni on 03-21-2010 at 8:56 pm

    The 2010 ISSCC theme was all about “Sensing the Future” and was one of the most inspiring semiconductor conferences I have experienced. The halls were filled with the top names in semiconductor design and manufacture from around the world. The sessions highlighted not only technology breakthroughs (first 4G silicon), but new… Read More


    TSMC versus SAMSUNG

    TSMC versus SAMSUNG
    by Daniel Nenni on 03-07-2010 at 8:49 pm

    According to the EETimes“The leading-edge foundry market is up for grabs, as several vendors have stumbled or been victims of the shakeout “. According to people who actually work with the foundries, like myself, the leading edge foundry market will continue to be dominated by TSMC and GlobalFoundries is the “dark horse”. SamsungRead More


    TSMC vs GlobalFoundries vs IBM

    TSMC vs GlobalFoundries vs IBM
    by Daniel Nenni on 02-28-2010 at 10:22 pm

    Last week TSMC hosted the2010 Executive Forum on Leading Edge Semiconductor Technology in Yokohama, Japan. The Senior Vice President of R&D at TSMC lectured on process development and the individual technologies for the 45/40nm, 32/28nm and 22/20nm nodes and explained the current status.

    Dr. Shang-Yi Chiang joined TSMC… Read More


    GlobalFoundries and the Mobile World Congress

    GlobalFoundries and the Mobile World Congress
    by Daniel Nenni on 02-22-2010 at 12:30 am

    One may ask why in the semiconductor world would GlobalFoundries(GFI) exhibit at the Mobile World Congress last week, the world’s largest exhibition for the mobile industry. And not just exhibit, GFI turned out at en force with meeting rooms and bright orange signage declaring a mobile revolution. Why? Here is your first clue:… Read More


    The GlobalFoundries Enigma

    The GlobalFoundries Enigma
    by Daniel Nenni on 02-09-2010 at 9:31 pm

    When AMD sought to shed its costly manufacturing unit Ibrahim Ajami saw an interesting opportunity, one that will eventually bring semiconductor manufacturing to Abu Dhabi. Let’s start with the recent interview published with Ajami, the 34 year old Chief Executive Officer of Advanced Technology Investment Company (ATIC),… Read More