This morning I went to a presentation in Palo Alto about outsourcing in Vietnam. You have probably heard that Vietnam is the new China for manufacturing, as wages have increased in the Shenzhen area then companies like Foxconn have opened plants in Vietnam. But this meeting was mostly about services, software and design. In this… Read More
Jitter: The Overlooked PDN Quality MetricBruce Caryl is a Product Specialist with Siemens EDA…Read More
CEO Interview with Vamshi Kothur, of Tuple TechnologiesIt was my pleasure to meet with Vamshi…Read More
Webinar – Power is the New Performance: Scaling Power & Performance for Next Generation SoCsWhat if you could reduce power and extend…Read More
Reachability in Analog and AMS. Innovation in VerificationCan a combination of learning-based surrogate models plus…Read More
Semiconductor Mergers – Innovation or Consolidation?
About 3 years ago, I had written an article about consolidation in the semiconductor landscape where I had articulated 4 main reasons of consolidation – Macroeconomics, Business Leadership, Technology Leadership, and IP leadership. Back then, based on the state of affairs in the semiconductor industry, I had also mentioned… Read More
Talking Directly to EDA R&D
Many EDA companies keep their R&D engineers focused on product development and bug fixing, shielding them from any and all direct contact with end-users, mostly for fear of what might be revealed if such direct dialog were allowed. Customer support people are allowed to talk directly with customers, then pass along enhancement… Read More
Addressing Moore’s Law with the First Law of Real Estate: Location, location, location
Design sizes and complexities have grown exponentially (it’s a Law!), and consequentially the task of silicon test has become proportionally more expensive. The cost of testing a device is proportional to the amount of test data that is applied, and therefore the time it takes, which in turn is proportional to both design size … Read More
SSD Storage Chips: Basic Interconnect Considerations
The joint development of 3D XPoint memory technology from Intel and Micron has once more brought the spotlight on data centers and chips for solid-state drives (SSDs). The two semiconductor industry giants claim that 3D XPoint memory is1,000 times faster than NAND Flash: the underlying memory content for SSDs. Such developments… Read More
I want to use USB Type C (and I want it now)
USB is certainly the most ubiquitous of the Interface protocols, used in our day to day life to connect multiple systems, as well as in professional segments like industrial or even high performance servers (yes, these systems integrates USB 3 connections). But USB is also one of the protocols able to generate frustration every… Read More
Silvaco 30 Years Ago
It’s Silvaco’s 30 year anniversary. You may already know the dry official story of the early days:
- Founded in 1984 by Dr Ivan Pesic
- In 1984 the initial product, Utmost, quickly became the industry standard for parameter extraction, device characterization and modeling.
- In 1985 Silvaco entered the SPICE circuit
ARM and the Law of Accelerating Returns!
ARM is one of the companies I have had professional experience with during my storied semiconductor career so I know some of their history first hand. I worked for a physical IP company that was purchased by ARM and at Virage Logic we competed against ARM head-to-head. ARM is also featured in our book “Fabless: The Transformation … Read More
A Key Aspect Missing for IoT to become NBT
The IoT (Internet of Things) is not one product, technology, segment, or market. It’s a combination of many things, many markets, and many technologies. However, it’s one thing that needs to connect everything together; edge device to gateway to cloud. That brings the complexity, how’s that possible amid large heaps of heterogeneous… Read More
Boost the Market for Interposer and 3D ICs with Assembly Design Kits
The traditional system-on-chip (SoC) design process has fully qualified verification methods embodied in the form of process design kits (PDKs). Why is it that chip design companies and assembly houses have no IC/package co-design sign-off verification process?
Package die are often produced using multiple processes and… Read More
Facing the Quantum Nature of EUV Lithography