Enabling RISC-V & AI Innovations with Andes AX45MPV Running Live on S2C Prodigy S8-100 Prototyping SystemQualifying an AI-class RISC-V SoC demands proving that…Read More
DAC News – A New Era of Electronic Design Begins with Siemens EDA AIAI is the centerpiece of DAC this year.…Read More
Arteris at the 2025 Design Automation Conference #62DACKey Takeaways: Expanded Multi-Die Solution: Arteris showcases its…Read More
There is a widespread phenomenon in designing chips that new effects creep up on you. First they are so small you can ignore them. Then you can add a little pessimism to your timing budget or whatever gets affected. But eventually the effects go from second order to first order. You certainly can’t ignore them, and the guard … Read More
GaN technology is disruptive, in the best sense of the word, making possible what was once thought to be impossible – eGaN® technology is 10 times faster, significantly smaller, and with higher performance at costs comparable to silicon-based MOSFETs. The inevitability of GaN displacing the aging power MOSFET is becoming clearer… Read More
If you don’t know about Karen Bartleson, before I get into details, let me tell you that she was the President of IEEE-SA for the past 2 years and has been nominated by the IEEE Board of Directors as one of the candidates for IEEE President-Elect for 2016. The IEEE is an organization I admire as it plays a key role in advancing technology… Read More
Qualcomm’s new system-on-chip (SoC), Snapdragon 820, has come out with a few technical details, and it’s already making waves with its impressive GPU features and a powerful camera engine. At the same time, however, a couple of industry bytes have clouded the Snapdragon 820 launch fanfare.
First, Apple’s… Read More
The latest Intel rumor that the pro Intel media are flogging is that Intel modems will be in some of the new iPhones. The deal is estimated at around $1B. An “estimated” value of a “rumor” deal is quite funny in itself but let’s take a deeper look at what we are gossiping about here.
Intel got into the 3G/LTE business after acquiring the… Read More
After its successful launch last year, the “Design and Verification Conference & Exhibition India” (DVCon India) will be held on Sept 10 – 11 in Bangalore. The event primarily has two tracks: ESL and DV. The ESL track covers electronic system level (ESL) design and verification, including virtual prototypes of electronic… Read More
Apple announces their new products with much media attention to an audience of enthusiastic attendees, along with a live stream to all of us on the Internet who couldn’t be there in person. Samsung is following that same marketing playbook and today hosted an event in New York dubbed, “Everything Galaxy Unpacked 2015”… Read More
Next week is the Intel Developer Forum (IDF) here in San Francisco at the Moscone Center. I’ll be there at least some of the time. But it is also the time that people who haven’t a clue about semiconductors and the market that it serves get to lap up press releases and try and sound intelligent.
For example:
Intel is about… Read More
When situation demands, multiple solutions appear with a slight lag of time. Similar is the story with estimating and optimizing power at SoC level. In the SoC era, power has become a critical criterion long ago, and there are tools available for power analysis and optimization. However, with more mobile and IoT (Internet of Things)… Read More
Continuous, incremental improvement based on customer feedback and insight from researchers is a pillar of the Aldec EDA strategy. Within the last two weeks, two of the Aldec product lines – Riviera-PRO, and ALINT-PRO-CDC – have seen new version releases. Here’s a quick look at some of the highlights of both.
Riviera-PRO 2015.06… Read More
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Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot