Totem webinar: Analog/Mixed-Signal Power Noise and Reliability

Totem webinar: Analog/Mixed-Signal Power Noise and Reliability
by Paul McLellan on 07-30-2011 at 5:26 pm

Image RemovedThe Totem webinar will be at 11am on Tuesday 2nd August. This session will be conducted by Karan Sahni, Senior Applications Engineer at Apache Design Solutions. Karan has been with Apache since 2008, supporting the Redhawk, Totem, Sentinel product lines. He received his MS in Electrical Engineering from the Syracuse… Read More


CDNS EDA360 is DEAD!

CDNS EDA360 is DEAD!
by Daniel Nenni on 07-30-2011 at 3:00 am

Hard to believe EDA360, the Cadence Blueprint toBattle ‘Profitability Gap’; Counters Semiconductor Industry’s Greatest Threat!, is DEAD at the ripe old age of one. As you may have already read John Bruggeman left Cadence after the company conference call last week. The formal announcement should go out on Monday after the SEC… Read More


Cache Coherency and Verification Seminar

Cache Coherency and Verification Seminar
by Paul McLellan on 07-27-2011 at 5:45 pm

Image RemovedAt DAC Jasper presented a seminar with ARM on cache coherency and verification of cache coherency. The seminar is now available online for those of you that missed DAC or missed the seminar itself.

Cache architectures, especially for multi-core architectures, are getting more and more complex. Techniques originally… Read More


Intel’s Mobile Deja Vu All Over Again Moment

Intel’s Mobile Deja Vu All Over Again Moment
by Ed McKernan on 07-26-2011 at 12:49 pm

We have been here before… and when I say “we” I do include myself. Back in 1997, I joined a secretive company called Transmeta. The company was two years old and working on a new x86 microprocessor to challenge Intel. The original focus of the company was not to build a lower power processor, but one that was faster. As with… Read More


Synopsys MIPI Webinar

Synopsys MIPI Webinar
by Eric Esteve on 07-26-2011 at 6:05 am

Synopsys MIPI Webinar: MIPI is really getting traction

Synopsys last two acquisitions of IP vendors, former ChipIdea in 2009 (Mixed-signal product line of MIPS) and Virage Logic in 2010, have allowed to built a stronger, diversified IP port-folio. Amazingly, Synopsys has found MIPI IP product line in the basket in both cases.… Read More


Global Technology Conference 2011

Global Technology Conference 2011
by Daniel Nenni on 07-24-2011 at 1:13 pm

Competition is what made the semiconductor industry and semiconductors themselves what they are today! Competition is what drives innovation and keeps costs down. Not destructive competition, where the success of one depends on the failure of another, but constructive competition that promotes mutual survival and growth… Read More


Intel Q2 Financial Secret: “Shhhh….We’re on Allocation”

Intel Q2 Financial Secret: “Shhhh….We’re on Allocation”
by Ed McKernan on 07-22-2011 at 10:47 pm

Every Semiconductor Analyst has given Intel the once over a hundred times about their slowing PC unit volume. They are looking in the wrong place because the true secret of the Q2 earnings – in my humble opinion – is that Intel’s factories are full and parts are on allocation. What???

Check it out, high-end, 8 and 10 core XEON processors… Read More


PowerArtist webinar

PowerArtist webinar
by Paul McLellan on 07-21-2011 at 3:21 pm

Image RemovedThe next Apache webinar is on PowerArtist, RTL Power Analysis on July 26th at 11am Pacific time. The webinar will be conducted by David “Woody” Norwood, Principal Applications Engineer at Apache Design Solutions. David has been supporting RTL Power products for the past 8 years. He has broad EDA industry… Read More


Intel’s Barbed Wire Fence Strategy

Intel’s Barbed Wire Fence Strategy
by Ed McKernan on 07-21-2011 at 11:38 am

Analysts tend to make judgments regarding Intel based on an existing conventional wisdom (CW) and projecting straight line into the future. As a former Intel, Cyrix, and Transmeta processor marketing guy I would like to offer a different perspective as I have been both inside the tent looking out and outside looking in.
Image RemovedRead More


Want to learn Mixed-Signal Design and Verification?

Want to learn Mixed-Signal Design and Verification?
by Daniel Payne on 07-20-2011 at 6:13 pm

Workshops are a great where to learn hands-on about IC design technology. Mentor has a free workshop to introduce you to creating, simulating and verifying mixed-signal (Analog and Digital) designs.
Image Removed
PLL waveforms showing both digital and analog signals.

Dates in Fremont, California
July 26, 2011
September 15,… Read More