Verifying 10+ Billion-Gate Designs Requires Distinct, Scalable Hardware Emulation Architecture

Verifying 10+ Billion-Gate Designs Requires Distinct, Scalable Hardware Emulation Architecture
by Daniel Nenni on 08-29-2022 at 6:00 am

960 x 540 Veloce

In a two-part series, Lauro Rizzatti examines why three kinds of hardware-assisted verification engines are a must have for today’s semiconductor designs. To do so, he interviewed Siemens EDA’s Vijay Chobisa and Juergen Jaeger to learn more about the Veloce hardware-assisted verification systems.

What follows is part one,… Read More


DSP IP for High Performance Sensor Fusion on an Embedded Budget

DSP IP for High Performance Sensor Fusion on an Embedded Budget
by Kalar Rajendiran on 08-04-2022 at 6:00 am

VPX Vector DSP Core Data Types

Whether we realize it or not, everyday applications we use depend on data gathered by sensors. We can bet that pretty much every application uses at least a couple of different types of sensors, if not more. That is because different types of sensors are better suited to collect data depending on the application, the environment … Read More


Scalability – A Looming Problem in Safety Analysis

Scalability – A Looming Problem in Safety Analysis
by Stefano Lorenzini on 07-28-2022 at 6:00 am

Figure 2 FMEDA white paper

Scalability – A Looming Problem in Safety Analysis

The boundless possibilities of automation in cars and other vehicles have captivated designers to the point that electronic content is now a stronger driver of differentiation than any other factor. It accounts for a substantial fraction of material cost in any of these vehicles.… Read More


Can We Auto-Generate Complete RTL, SVA, UVM Testbench, C/C++ Driver Code, and Documentation for Entire IP Blocks?

Can We Auto-Generate Complete RTL, SVA, UVM Testbench, C/C++ Driver Code, and Documentation for Entire IP Blocks?
by Kalar Rajendiran on 07-11-2022 at 6:00 am

IDSNG1

Whether it is fully autonomous driving, or wrinkle-free fabric, or ambient energy harvesting for powering electronic devices, each industry is chasing after its respective ultimate goal. For the semiconductor design industry, its goal is the capability to generate complete chip or IP in executable format from a high-level… Read More


Accellera Update: CDC, Safety and AMS

Accellera Update: CDC, Safety and AMS
by Bernard Murphy on 07-06-2022 at 6:00 am

logo accellera min

I recently had an update from Lu Dai, Chairman of Accellera, also Sr. Director of Engineering at Qualcomm. He’s always a pleasure to talk to, in this instance giving me a capsule summary of status in 3 areas that interested me: CDC, Functional Safety and AMS. I will start with CDC, a new proposed working group in Accellera. To manage… Read More


TSMC 2022 Technology Symposium Review – Process Technology Development

TSMC 2022 Technology Symposium Review – Process Technology Development
by Tom Dillinger on 06-22-2022 at 5:00 am

finFLEX

TSMC recently held their annual Technology Symposium in Santa Clara, CA.  The presentations provided a comprehensive overview of their status and upcoming roadmap, covering all facets of process technology and advanced packaging development.  This article will summarize the highlights of the process technology updates… Read More


Efficient Memory BIST Implementation

Efficient Memory BIST Implementation
by Daniel Payne on 05-05-2022 at 10:00 am

Figure 1 min

Test experts use the acronym BIST for Built In Self Test, it’s the test logic added to an IP block that speeds up the task of testing by creating stimulus and then looking at the output results. Memory IP is a popular category for SoC designers, as modern chips include multiple memory blocks for fast, local data and register storage… Read More


ITSA – Not So Intelligent Transportation

ITSA – Not So Intelligent Transportation
by Roger C. Lanctot on 05-01-2022 at 10:00 am

ITSA Not So Intelligent Transportation

The Infrastructure Investment and Jobs Act (IIJA) passed last year in the U.S. earmarks billions of dollars that can be used for the deployment of potentially life-saving C-V2X car connectivity technology. The U.S. Department of Transportation and state DOTs are poised to commence that spending, but one thing stands in the … Read More


Tesla: Canary in the Coal Mine

Tesla: Canary in the Coal Mine
by Roger C. Lanctot on 04-17-2022 at 6:00 am

Tesla Canary in the Coal Mine

The automotive industry is tied up in knots over cybersecurity. Consumers expect their cars to be secure. Car makers spend millions on securing cars, but don’t know how, what, or if to charge consumers for security.

Meanwhile, most cyber penetration reports to organizations such as the Auto-ISAC are related to enterprise attacks. … Read More


WEBINAR: How to Improve IP Quality for Compliance

WEBINAR: How to Improve IP Quality for Compliance
by Daniel Nenni on 04-14-2022 at 6:00 am

webinar semiwiki improving ip quality

Establishing traceability is critical for many organizations — and a must for those who need to prove compliance. Too often, the compliance process is manual, leading to errors and even delays. A simple clerical mistake can invalidate results and lead to larger issues throughout the product’s lifecycle. Developing a unified,… Read More