Dr. Stanley Hyduke, founder and CEO of Aldec talks about how keeping pace with the evolution of FPGAs and listening to customers underpin the company’s success.… Read More
CEO Interview: Stanley Hyduke, founder and CEO of Aldec
Posts Search Results for "DO-254"
CDC Verification for FPGA – Beyond the Basics
FPGAs have become a lot more capable and a lot more powerful, more closely resembling SoCs than the glue-logic we once considered them to be. Look at any big FPGA – a Xilinx Zynq, an Intel/Altera Arria or a Microsemi SmartFusion; these devices are full-blown SoCs, functionally different from an ASIC SoC only in that some of the device… Read More
3 in 1 Hardware Verification
Aldec has offered front-end EDA tools for over 30 years but may not be a familiar name to mainstream IC design engineers. That’s probably because for most that period they haven’t really targeted IC design. They have been much more focused on PC-based design for FPGAs particularly where requirements traceability has been important,… Read More
Aldec extends FPGA and ASIC flows at DAC
Aldec tools and services have long been associated with FPGA designs. As FPGAs have evolved toward more RTL-based designs, the similarities between a modern FPGA verification flow and an ASIC verification flow often leave them looking virtually the same. … Read More
Updated tool cuts through DO-254 V&V chaos
Audits. The mere mention of the word keeps project managers up at night and sends most designers running. However, in the case of FPGA designs seeking DO-254 compliance, the product doesn’t ship until the audit is complete – there is no avoiding it, or skating around it.… Read More
Design For Safety in Automotive Electronics
Do you remember how auto maker Toyota had to pay a $1.2 billion settlement in 2014 because some of their automotive models experienced sudden, unintended acceleration? That scenario has to be an engineer’s worst nightmare because something was missed during the design and testing of an automotive electronics system that… Read More
Aldec packs 6 UltraScale parts on HES-7
A few months ago, when the Xilinx UltraScale VU440 FPGA began shipping, one of the immediate claims was a quad-FPGA-based prototyping board touted as “Godzilla’s Butcher on Steroids”. That was a refreshing and creative PR approach, frankly. I’m always careful with less creative terms like “world’s biggest” or “world’s fastest”,… Read More
S2C eyeing 1B gate FPGA-based prototypes
We hear a lot about FPGA-based prototyping hardware: Aldec, Dini Group, PRO DESIGN, Synopsys, and others. So, why is today’s news on a new platform from S2C important? It’s a matter of intent, beyond the act of gluing a few large FPGAs on a board for customers to dump more and more prospective RTL into.
Size differences aside, each … Read More
Writing the unwritten rules with ALINT-PRO-CDC
EDA verification tools generally do a great job of analyzing the written rules in digital design. Clock domain crossings (CDCs) are more like those unwritten rules in baseball; whether or not you have a problem remains indefinite until later, when retaliation can come swiftly out of nowhere.
Rarely as overt or dramatic as a bench-clearing… Read More
Real FPGAs don’t eat fake test vectors
Vector blasting hardware is as old as digital test methodology itself. In the days of relatively simple combinational and finite state machine logic, a set of vectors aimed broadside at inputs could shake loose most faults with observable outputs. With FPGAs, creating an effective set of artificial test vectors has become a lot… Read More
Has ASML Reached the Great Wall of China