The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node SurvivalThe philosophy of relying on a single, unified…Read More
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Sivakumar P R is the Founder and CEO of Maven Silicon. He is responsible for the company’s vision, overall strategy, business, and technology. He is also the Founder and CEO of Aceic Design Technologies.
Sivakumar is a seasoned engineering professional who has worked in various fields, including electrical engineering,… Read More
One of the most unique acronyms that I learned about this past year is ACAP from Xilinx, which stands for Adaptive Compute Acceleration Platform. At the recent Cadence LIVE event, I had the pleasure of watching Pei Yao, a Xilinx senior staff CAD engineer, as she talked about the challenges of getting all the analog and mixed-signals… Read More
SemiWiki has covered many aspects of Silicon Catalyst, from their business model to notable industry events and profiles of promising startups. You can get some perspective on the breadth and depth of Silicon Catalyst here. In this post, I’ll explore an aspect of the broader collaboration the organization is engaging in. It is… Read More
Semiconductor manufacturers are expanding capital spending in 2021 and beyond to help alleviate shortages. In addition, many governments around the world are proposing funding to support semiconductor manufacturing in their countries.
The United States Senate this month approved a bill which includes $52 billion to fund… Read More
When thinking about positioning you probably first think of navigation. The device in your car that helps get from where you are to where you want to be. Or navigating while hiking in the backcountry. But those applications are not the where the big unit growth will come. The biggest demand will be in asset tracking, expected to reach… Read More
Last week, Cadence hosted its annual CadenceLIVE Americas conference. Four keynotes and eighty-three different talks on various topics were presented. The talks were delivered by Cadence, its customers and partners.
This blog is about the two keynotes delivered by CEO Lip-Bu Tan and President Dr. Anirudh Devgan. The guest … Read More
This summer, I got the opportunity to work as a Formal Verification Intern with Axiomise for six weeks. I’m a keen designer and love working in design and architecture. Although, I’ve not started my professional career yet, I have done most of my projects as a designer in my undergraduate and postgraduate studies.
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I first remember blogging about EDA in the cloud starting back in 2011, so what’s changed in the last 10 years you may ask? In 2011, it was basically a handful of EDA point tools running batch mode in the cloud, and you were on your own to integrate those into a coherent flow, so expect help from the CAD and IT departments for sure.… Read More
If you ascribe to the notion that things move in circles, or concentrically, the move to die-to-die connectivity makes complete sense. Just as multi-chip modules (MCM) were the right technology decades ago to improve power, areas, performance and cost, the use of chiplets with die-to-die connections provides many advantages… Read More
I met Andy Grove on a sunny day in New York City in 1987. He was dashing to press interviews for his just-off-the-presses management book, “One on One with Andy Grove.” I was a freshly badged member of the press working for IEEE Spectrum, a year or so out of college, still toting my college backpack. Little did I know that that would be … Read More
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The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival