Should the US Government Invest in Intel?“Most companies don’t die because they are wrong;…Read More
PDF Solutions and the Value of Fearless CreativityPDF Solutions has been around for over 30…Read More
Security has been a domain blessed with an abundance of methods to improve in various ways, not so much in methods to measure the effectiveness of those improvements. With the best will in the world, absent an agreed security measurement, all those improvement techniques still add up to “trust me, our baby monitor camera is really… Read More
In Part 2, we discussed the second false-start of Ultra-WideBand (UWB) leveraging over-engineered orthogonal frequency-division multiplexing (OFDM) transceivers, launching at the dawn of the great recession and surpassed by a new generation of Wi-Fi transceivers. These circumstances signed the end of the proposed applications… Read More
The old adage, “Time is money”, certainly rings true today for IC designers, so the entire EDA industry has focused on this challenging goal of making tools that help speed up design and physical verification tasks like DRC (Design Rule Checks) and LVS (Layout Versus Schematic). Sure, the big three EDA vendors have… Read More
I had the opportunity to preview an upcoming webinar on SemiWiki that deals with design robustness for signoff regarding advanced node digital designs (think single-digit nanometers). “Design robustness” is a key term – it refers to high quality, high yielding SoCs that come up quickly and reliably in the target system. We all… Read More
Before starting your next FPGA Prototyping Project you should catch the next SemiWiki webinar – “Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards”, in partnership with Aldec.
A significant portion of my 30+ years in the EDA industry has revolved around design verification with some form of FPGA … Read More
As technology consumers we make tradeoffs.
We let Google peer into our online activity and email communications and we even accept annoying advertisements tied to our browsing activity in order to access free email and browing. We tolerate smartphones with diminishing performance from Apple – even after Apple admits that the
The current leading edge of advanced lithography nodes (e.g., “7nm” or “1Z nm”) features pitches (center-center distances between lines) in the range of 30-40 nm. Whether EUV (13.5 nm wavelength) or ArF (193 nm wavelength) lithography is used, one thing for certain is that the minimum imaged pitch … Read More
Technological leadership has long been key to TSMC’s success and they are following up their leadership development of 5nm with the world’s smallest SRAM cell at 0.021um 2 with circuit design details of their write assist techniques necessary to achieve the full potential of this revolutionary technology. In addition to their… Read More
Over-engineered to perfection, outmaneuvered by Wi-Fi
In Part 1 of this series, we recounted the birth of wideband radio at the turn of the 20th century, and how superheterodyne radio killed wideband radios for messaging after 1920. But RADAR kept wideband research alive through World War 2 and the Cold War. Indeed, the story of… Read More
Corona Fab Impact –
lower production/raise prices
Chip production supply chain may break
It could temporarily fix memory oversupply
Could it risk the fall roll out of next Iphone
The ” Two week tango” – Waiting games at fabs
When a highly specialized piece of semiconductor equipment misbehaves to the… Read More
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Intel’s Pearl Harbor Moment