Streamlining Functional Verification for Multi-Die and Chiplet DesignsAs multi-die and chiplet-based system designs become more…Read More
S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
Samtec Practical Cable Management for High-Data-Rate SystemsAccording to a recent Samtec whitepaper, in high-data-rate…Read More
A Quick Tour Through Prompt Engineering as it Might Apply to DebugThe immediate appeal of large language models (LLMs)…Read More
Among the multiple technologies that are poised to deliver substantial value in the future, Artificial Intelligence (AI) tops the list. An IEEE survey showed that AI will drive the majority of innovation across almost every industry sector in the next one to five years.
As a result, the AI revolution is motivating the need for … Read More
Sometimes we miss the forest for the trees, and I’m as guilty as anyone else. When we think testbenches, we rightly turn to UVM because that’s the agreed standard, and everyone has been investing their energy in learning UVM. UVM is fine, so why do we need to talk about anything different? That’s the forest and trees thing. We don’t … Read More
The much anticipated (virtual) DVCON 2022 is happening this week and functional verification plus UVM is a very hot topic. Functional Verification Engineers using UVM can enjoy a large number of benefits by synthesizing test content for their testbenches. Abstract, easily composable models, coverage-driven content, deep… Read More
Intel’s big investor day was anything but big. The stock reacted poorly, down 5% on a day that was a widespread sell-off anyways.
I want to briefly summarize what matters for the stock. There was very little incremental news to the technology roadmap, and the financial outlook was underwhelming, to say the least.
The revenue guide… Read More
Dan is joined by John East, the former CEO of Actel. In the sixth episode of Semiconductor Insiders John explained the beginnings of Fairchild Semiconductor and the significance of the Traitorous Eight.
In this follow-up discussion, John recounts the rise and fall of Fairchild Semiconductor. This is a turbulent and significant … Read More
Why does the industry need another register management tool? This is a question that Tamas Olaszi, the founder of Jade Design Automation hears from time to time since Jade-DA brought Register Manager, their EDA tool, to market. So why?
There is a genuine answer to this question but first let me use this interview to give some helpful… Read More
We are living in the age of big data and the future is going to be even more data centric. Today’s major market drivers all have one thing in common: efficient management of data. Whether it is 5G, hyperscale computing, artificial intelligence, autonomous vehicles, or IoT, there is data creation, processing, transmission, and … Read More
Lauro Rizzatti recently interviewed Andy Meier, product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy is a product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy has held positions in the electronics and high-tech fields during his 20-year career including: Sr.… Read More
The Accellera organization created the concept of a Unified Power Format (UPF) back in 2006, and by 2007 they shared version 1.0 so that chip designers would have a standard way to communicate the power intentions of IP blocks and full chips. By 2009 the IEEE received the Accellera donation on UPF , reviewed multiple drafts and published… Read More
The success of modern battery-powered products depends as much on useful operating time between charges as on functionality. FinFET process technologies overtook earlier planar CMOS in part because they significantly reduce leakage power. But they exacerbate dynamic power consumption thanks to increased pin capacitances.… Read More
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Should the US Government Invest in Intel?