Streamlining Functional Verification for Multi-Die and Chiplet DesignsAs multi-die and chiplet-based system designs become more…Read More
S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
Samtec Practical Cable Management for High-Data-Rate SystemsAccording to a recent Samtec whitepaper, in high-data-rate…Read More
In sports, we’re all familiar with how even a team with the best individual players for every role needs to be coordinated as a team to win a championship. In healthcare, a patient is better served with a well-trained primary physician to coordinate with the various medical specialists. The field of semiconductors involves a series… Read More
RISC-V processor IP is abundant. Open-source code for RISC-V is also widely available, but typically project-based code solves one specific problem. Using only pieces of code, it’s often up to a development team integrate a complete application-ready stack for creating an embedded device. A commercial embedded software development… Read More
The slogan for the DesignCon conference has been “where the chip meets the board”. Traditionally, the conference has provided a breadth of technical presentations covering the design and analysis of high-speed communication interfaces and power integrity evaluations between chip, board, and system.
The recent DesignCon… Read More
To the general public, EUV lithography’s resolution can be traced back to its short wavelengths (13.2-13.8 nm), but the true printed resolution has always been affected by the stochastic behavior of the electrons released by EUV absorption [1-5].
A 0.33 NA EUV system is expected to have a diffraction-limited point spread… Read More
With time-to-market pressures ever increasing, companies are continually seeking enhanced designer productivity, faster design closure and improved project management efficiency. To accomplish these, organizations invest a lot in implementing both standardized approaches and proprietary techniques. With ever increasing… Read More
From initial process technology development (TD) to high volume manufacturing (HVM) status for a new node, one of the key support functions to improve and maintain yield is the in-line wafer inspection technology. Actually, there are multiple inspection technologies commonly employed, with tradeoffs in pixel resolution,… Read More
Prioritizing gender-related behavior in the analysis of transportation patterns may change planning priorities and accelerate a transition to more sustainable mobility solutions. That is the finding of a report compiled by the Ministry of Environmental Protection in Tel Aviv, Israel and shared at the Women in Mobility summit… Read More
Dan is joined by Bob Smith, executive director of the ESD Alliance, a SEMI technology community. The ESD Alliance represents the electronic system and semiconductor design ecosystems. It is the first design-oriented community in SEMI.
Bob explores the mission of the ESD Alliance and how the organization leverages the worldwide… Read More
There is no shortage of reporting on the many technological advances happening within the semiconductor industry. But sometimes it feels like we hear less in the area of semiconductor manufacturing equipment than in the design and product arenas. That doesn’t mean that there is less happening there or what is happening there … Read More
The quest for bigger FPGA-based prototyping platforms continues, in lockstep with each new generation of faster, higher capacity FPGAs. The arrival of the Xilinx Virtex UltraScale+ VU19P FPGA takes capacity to new levels and adds transceiver and I/O bandwidth. When these slot into S2C’s Prodigy S7-19P Logic System, the result… Read More
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Should Intel be Split in Half?