Staff Design Engineer

Job Description/Responsibilities

The employee will contribute to the architecture, design, and implementation of high-performance FPGA cores and surrounding logic implemented in 7nm/16nm and below.  His or her responsibilities will include the following:

• Design and develop solutions to enabling connectivity between FPGA logic and surrounding ASIC logic and high-speed interfaces, such as PCI Express, 400Gbps Ethernet, GDDR6, DDR4, etc.
• Design and develop solutions for processor subsystem development in FPGAs.
• Develop and implement various configurable components within the FPGA fabric using proprietary and industry standard languages and tools.
• Develop automated processes for block-level and system-level development and verification.
• Collaborate with internal and external team members on architectural decisions and development flows and methodologies.
• Mentor junior engineers

Required Skills

• Knowledge and familiarity with ASIC development in support of high-speed interfaces, including experience with one of PCIe, Ethernet, and high-speed memory interfaces.
• Knowledge and familiarity with modern SoC and processor development, such as ARM or Risc-V processors.
• Expert RTL developer with SystemVerilog with experience using ASIC development techniques and designs flows at modern technology nodes, including synthesis and timing closure.
• Knowledge and familiarity with FPGA development.
• Ability to supervise the creation of complex test and verification plans.
• Strong in technical writing and communication (verbal) skills.

Education and Experience

• A minimum of 5+ years’ experience.
• Bachelor or Master’s degree in Computer or Electrical Engineering.