Senior Development Engineer – PVD
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Website Pragmatic
Overview
- Develop thin film deposition processes including metal, dielectric and semiconductors for Pragmatic’s flexible IC production.
- One important task will be to improve existing processes, moving them from development into mass manufacturing, demonstrating acceptable performance via Cp/CpK, throughput and defectivity, on Pragmatic’s recently installed 300mm wafer production line.
- Further activities will centre upon the development of similar but more advanced processes, in tandem with the Research team, to rapidly establish manufacturable paths to next-generation flexible IC devices.
Key tasks
- Optimise TFT Barrier Layer deposition process, whilst delivering aggressive throughput and quality improvements.
- Develop semiconductor deposition to meet TFT performance consistency at scale.
- Improve resistor layer performance uniformity, and in consort with vendors, develop next-generation hardware to provide robust deposition solutions for advanced tech nodes.
- Establish comprehensive characterisation of sputtered films and devise introductory process controls for current and new processes.
- Train a PVD engineer to support the above tasks.
Qualifications and training
- Degree in Physical Sciences, Electronics Engineering
- PhD with an emphasis on practical micro/nanoscale device fabrication is preferred although not essential.
- Microsoft.
- SQL/databases, 6-sigma
Skills and experience
- Previous experience of Micro-electronics fabrication, particularly in vacuum deposition of thin films
- Good knowledge and experience of characterisation techniques for microstructure fabrication, such as semiconductor, AFM, Surface Profilometery, Ellipsometry
- Excellent knowledge of Physical Vacuum Deposition techniques including especially plasma-based methods.
- Good track record of industrial experience in device fabrication process development.
- Competence at efficient experimental practise and design techniques
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