Leti Semicon Workshop

San Francisco Marriott Marquis 780 Mission Street, San Francisco, CA, United States

Join CEA-Leti CEO Sébastien Dauvé and a panel of tech experts and partners at Leti Semicon Workshop on July 9, 2024 – San Francisco CEA-Leti is setting up a novel …

Webinar: Digital Twin for Multi-physics Systems – How to Verify and Optimize Performance at the Overall Product Level

Online

Ensuring reliable performance of products in the field requires verification and validation at the system level. This means considering the complex interaction of different physics between systems and sub-systems. In this webinar, you will learn about purpose-driven digital twins that can: Optimize performance at the system level Co-simulate models benefitting from switchable, purpose-driven modeling fidelity …

ISO 26262 Safety Analysis: Streamline Your Path to Functional Safety

This course will be held Online

Whether you’re conducting safety analyses at the system, software, or hardware level, medini analyze can help you achieve:​ Up to 50% increased efficiency in your functional safety analyses, End-to-end traceability, including integration with your requirements management system, Consistency across your organization with the built-in configurable workflows to capture best practices TIME: JULY 10, 2024 11 AM - 12 AM …

AESIN Conference 2024

British Motor Museum Banbury Road Gaydon, Lighthorne Heath, Warwick, United Kingdom

About The Conference We are delighted to announce the AESIN Conference 2024 to be held on 11th July. This year’s AESIN theme is Collaboration in a technology rich era. We …

Webinar: Root of Trust

Online

Summary Join us for a weekly webinar series focusing on cutting-edge design and implementation techniques for hardware security. This series is perfect for engineers and designers looking to strengthen their knowledge, stay current with the latest hardware security advancements and learn more about security IP solutions. Each week, we will explore a critical topic in …

Webinar: Maximize Productivity with Deep Insights into PPA Trajectories

Online

The digital chip design flow carries with it an enormous wealth of untapped information regarding the health and status of your SoC design. The ability to efficiently mine this data provides chip designers with comprehensive visibility and actionable insights to uncover PPA opportunities. This webinar will introduce you to Synopsys Design.da, the industry’s first comprehensive data-visibility …

Webinar: Efficient Way to UVM Constraint Randomization Debug

Online

This webinar equips you with effective strategies to tackle randomization-related errors within your UVM verification environment. We'll explore the power of Cadence's Verisium Debug, a tool designed to simplify the debugging process. What You Will Learn Practical techniques for isolating and resolving randomization-related errors Optimize your UVM verification environment for robust functionality Gain valuable insights …

Webinar: Enhancing Manufacturing Test Flows with Synopsys VC Z01X

Online

Leveraging functional patterns is crucial for achieving high defect coverage and reducing defective parts per million (DPPM) levels. Synopsys VC Z01X fault simulator offers enhanced fault coverage in manufacturing test flows, complementing ATPG tools like Synopsys TestMAX ATPG. In this presentation we will delve into unique coverage scenarios, such as resets and clocks blocked during ATPG mode. We'll …

Webinar: MACsec & IPsec

Online

Summary Join us for a weekly webinar series focusing on cutting-edge design and implementation techniques for hardware security. This series is perfect for engineers and designers looking to strengthen their knowledge, stay current with the latest hardware security advancements and learn more about security IP solutions. Each week, we will explore a critical topic in …