WORKSHOP: Mastering Vivado Timing Constraints: Strategies for FPGA Performance Workshop (Sponsored by AMD)

Online

Mastering Vivado Timing Constraints: Strategies for FPGA Performance Workshop (Sponsored by AMD Xilinx) Description Do you struggle to identify which constraints are needed for a design or how to properly input them? This workshop will cover how to make use of the features provided by Vivado, clock domain crossing strategies, and how to get the …

Free

WEBINAR: Demystifying Clock Domain Crossings (CDC) and Synchronization Circuits

Online

Demystifying Clock Domain Crossings (CDC) and Synchronization Circuits Webinar Description This one-hour webinar will discuss all of the basics of what clock domain crossings (CDCs) are and how you can navigate them safely. We will discuss how to do single bit CDCs, several methods for CDC busses, and also the Xilinx Parameterized Macros (XPM) for …

Free

Webinar: The Rise of the DPU

Online

About Join us on LinkedIn Live to discuss "The Rise of the DPU"! Dive deep into Data Processing Units (DPUs) with industry experts Ron Renwick (Achronix), Patrick Kennedy (Servethehome.com), Baron Fung (Dell’Oro), and Scott Schweitzer (Achronix). Join our conversation to discuss technological advancements, market trends, and the evolving role of DPUs in AI/ML, cloud computing, and beyond. Get …