Webinar: From Copper to COUPE: Scaling AI Interconnects with Co-Packaged Optics
Featured Speakers:
- Igor Elkanovich, CTO, GUC
- Sheng-Fan Yang, Director, GUC
- Madhumita Sanyal, Sr. Director Product Management, Synopsys
Co-packaged optics (CPO) breaks through the data movement constraint by moving optical engines next to the XPU, reducing electrical reach from centimeters to millimeters and delivering the bandwidth density and energy efficiency that copper can no longer provide. In this webinar, Synopsys and GUC share their experience building CPO-enabled XPUs on TSMC COUPE, from high-speed interface IP through multiphysics signoff and manufacturing.
Join experts from Synopsys and GUC as we walk through real design and integration challenges, spanning EIC-over-PIC 3D stacking, high-speed 224G and UCIe interfaces, thermal analysis, and the path to volume manufacturing and test.
What You’ll Learn:
- Why AI scale-up and scale-out fabrics are driving CPO, and where ESUN and UALink fit
- How 224G and UCIe IP enable high-bandwidth, low-power optical engines in COUPE
- How GUC transforms COUPE into production-ready optical XPUs through advanced-packaging and 2.5D/3D integration expertise
- Proven results solving COUPE implementation challenges: EIC/PIC co-design, hybrid bonding, and interposer/RDL integration
- How Synopsys and GUC co-optimize XPU thermal behavior with optical engines using Synopsys multiphysics analysis technologies
- How GUC’s turnkey ASIC, manufacturing, and test flow delivers volume-ready CPO for AI systems
Featured Speakers
Igor Elkanovich
CTO, GUC
In recent 10 years Igor Elkanovich serves as GUC’s CTO, responsible for IP and methodology development using advanced silicon process and packaging technology, and supervising architecture and execution of large-scale AI projects. He holds 35 patents at different stages and focuses on AI, HPC, XPU and networking applications.
Director, GUC
Sheng-Fan Yang received his Ph.D. in electrical engineering (EE) from National Cheng Kung University (NCKU), Taiwan. Dr. Yang holds 25 US patents and 23 technical papers publication in the fields of signal/power/thermal integrity (SI/PI/TI) and electromagnetic compatibility (EMC).
Currently, he serves in GUC as a director, leading SI/PI/TI/MI division, for chip/package/system high speed integrated designs of AI ASIC products. His research interest includes high speed heterogeneous integration of 2D/2.5D/3D-IC, e.g., 112G/224G-SerDes, UCIe-A/S, HBM3/4, and multi-physics co-analysis.
Sr. Director of Technical Product Management, Synopsys
Madhumita Sanyal is a senior Director of Technical Product Management specializing in advanced interface technologies, C2C interconnects, and system architecture for next-generation computing platforms. She has 23+ years of experience in the design, and product management of high-speed I/O, system-level design, SoCs with a focus on enabling scalable solutions for AI, data center, and high-performance computing. More >
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