“Cadence Design Systems, Inc. (NASDAQ: CDNS), the global leader in EDA360………”
Of course, why wouldn’t Cadence be the global leader in something they just made up? As a follow-up to my yawningly successful blog Cadence EDA360 Manifesto:
One of the problems I have with EDA360 is the fear, uncertainty, and doubt (FUD) it attempts in the paragraph “from creators to integrators”. It argues that maintaining Moore’s law depends on “a continuing migration to lower process nodes to gain performance, power, and cost advantages”. It further claims that Moore’s law hit a wall due to rising development costs?
Figure 1 shows development costs for advanced process nodes. Look at 32nm: the cost is $100M, looks daunting, but actually 50-60% is software – which is completely not related to a new semiconductor process. The next ingredient: Architecture, design and verification account for another 25-30%. This is again not related to process technology or Moore’s law.
The only part that is influenced by a new process is the implementation and manufacturing which accounts to only about 10-15% of the cost. So given the total cost, it is clear that the process technology’s contribution to the cost increase is minor. So this graph and explanation fail to explain the issue and how it is related to a semiconductor process technology. It is FUD against the foundries and the advantages of moving to new process nodes.
A few large semiconductor companies will continue to followMoore’s Law and design the fastest, most complex, and smallest ICs. These innovators are design creators. While they will provide a crucial role in the industry, only a handful of such companies can exist.
Clearly there must be a way to be successful at lower volumes or with less advanced silicon. Consumer demand is setting the stage for new kinds of connected devices we haven’t even imagined yet. If electronic design is only available to a handful of creators who can only make money by shipping 80 million units, few of these devices will be built and the diversity that consumers want will not materialize.
I absolutely agree with the concept of the increased role of integration, but my conclusion is that there is no reason not to use the latest semiconductor process technology, on the contrary, it can be used to integrate previously separate parts into one chip using the same higher level software, architecture, etc. thereby accomplishing lower cost, lower system footprint, lower power, etc.
This way, fabless semiconductor companies can take advantage of the latest process technology at a relatively low incremental cost, as they don’t need to invest again in developing new architecture, new software etc., and they get to reduce the risk and time to market for this new integrated product.
The role of the EDA industry is semiconductor design enablement through design reuse, automated tools and flows, which includes process migration. If I’m wrong on this please let me know, but my conclusion on this point: Cadence EDA360 not only insults the other EDA companies that lead the market segments mentioned (design, implement, verify), it also alienates the foundries and the push for advanced technologies, in addition to the fabless companies that are today successfully designing to those advanced process nodes.
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