Swap and Play Extended To Chip Fabric and Memory Controllers

Virtual platforms enable software development to take place on a model of an electronic system. What everyone would like is models that are fast and accurate but that is simply not possible. Fast models are fast because they don’t model everything at the signal level. And accurate models get to be accurate by handling a lot of detail that inevitably makes them slow. Carbon’s virtual platform approach gets around this problem using a technology called Swap and Play. This allows the internal state of a fast model to be saved at any breakpoint and an accurate model to then be initialized with that saved state. In effect, the model switches from being fast to being accurate. Not quite as good as being fast and accurate all the time, but the next best thing.

RTL such as Verilog is, by definition, accurate, but it is too slow for software development. Carbon has a second technology in Carbon Model Studio, which takes RTL models and by throwing away a lot of detail speeds them up a lot. But since they started from the canonical RTL of the block they are completely faithful at the external signal level. These are known as “carbonized” models and they are implementation accurate.

In practice these two technologies mean that it is possible to boot an operating system in seconds and then get to the point of interest (perhaps initializing a device driver or handling some subtle power management issue) and then switch to the accurate model. This is still acceptably fast to allow, for example, stepping through the software while inspecting bus transactions or signal waveforms.
But this only works cleanly when fast models are available. These are normally not generated directly from the RTL but rather are usually created by hand. ARM, for example, creates fast models of all their processors and many other blocks, and these are then made available through Carbon’s IPexchange.

With the latest release of Carbon’s SoCDesigner Plus (their virtual platform technology) users can add fabric components and DDRx memory controllers from any vendor (or internal) to a Swap and Play virtual prototype. This makes it possible for many more systems to take advantage of the “boot an operating system in seconds and then switch to accurate debugging”. Previously support of fabric components and memory controllers was more limited, meaning that some systems could not take advantage of Swap and Play and so were too slow for many purposes.

Using design knowledge gained in the compilation process for these fabric components, not only is an implementation-accurate model created as usual but also a high-speed functional model. This model is capable of executing at 100s of MIPS and then being swapped out with the implementation accurate model at any breakpoint to delve deep into the details of the system.

Carbon Performance Analysis Kits (CPAKs) in the IP portal containing fabric components from Arteris and memory controllers from Cadence (Denali) have all been updated with the new Swap and Play technology.