4 goals of memory resource planning in SoCs

4 goals of memory resource planning in SoCs
by Don Dingee on 03-21-2016 at 4:00 pm

The classical problem every MBA student studies is manufacturing resource planning (MRP II). It quickly illustrates that at the system level, good throughput is not necessarily the result of combining fast individual tasks when shared bottlenecks and order dependency are involved. Modern SoC architecture, particularly … Read More


New CoreLink IP ties in mobile GPU coherently

New CoreLink IP ties in mobile GPU coherently
by Don Dingee on 10-29-2015 at 7:00 am

A mobile GPU is an expensive piece of SoC real estate in terms of footprint and power consumption, but critical to meeting user experience demands. GPU IP tuned for OpenGL ES is now a staple in high performance mobile devices, rendering polygons with shading and texture compression at impressive speeds.

Creative minds in the desktop… Read More


Bye-Bye DDRn Protocol?

Bye-Bye DDRn Protocol?
by Eric Esteve on 03-30-2014 at 11:34 am

In fact, this assertion is provocative, as the DDR4 protocol standard has just been released by JEDEC… after 10 years discussion around the protocol features. Yes, the first discussions about DDR4 have started ten years ago! Will DDR4 be used in the industry? The answer is certainly yes, and DDR4 will most probably be used for years.… Read More


Swap and Play Extended To Chip Fabric and Memory Controllers

Swap and Play Extended To Chip Fabric and Memory Controllers
by Paul McLellan on 06-16-2013 at 9:08 am

Virtual platforms enable software development to take place on a model of an electronic system. What everyone would like is models that are fast and accurate but that is simply not possible. Fast models are fast because they don’t model everything at the signal level. And accurate models get to be accurate by handling a lot of detail… Read More


Buying DDRn Controller IP AND Memory Model to the same IP vendor gives real TTM advantage

Buying DDRn Controller IP AND Memory Model to the same IP vendor gives real TTM advantage
by Eric Esteve on 01-17-2013 at 10:52 am

We all know the concept of “one stop shop”, becoming popular in the Design IP market. The topic we will address today is NOT the “one stop shop”, even if it looks similar, but rather that we could call “consistent design flow”.

What does that means? Simply that, if your SoC design is integrating a DDRn (LPDDR2, DDR3 or even DDR4, let… Read More


Memory Controller IP, battle field where Cadence and Synopsys are really fighting face to face. Today let’s have a look at Cadence’s strategy.

Memory Controller IP, battle field where Cadence and Synopsys are really fighting face to face. Today let’s have a look at Cadence’s strategy.
by Eric Esteve on 01-12-2012 at 9:45 am

I have shared with you last year some strategic information released by Cadence in April about their IP strategy, more specifically about the launch of the DDR4 Controller IP. And try to understand Cadence strategy about Interface IP in general (USB, PCIe, SATA, DDRn, HDMI, MIPI…) and how Cadence is positioned in respect with their… Read More


Interface Protocols, USB3, HDMI, MIPI… the winner and losers in 2011

Interface Protocols, USB3, HDMI, MIPI… the winner and losers in 2011
by Eric Esteve on 01-07-2012 at 11:30 am

Releasing a new protocol like ThunderBolt, HDMI or SuperSpeed USB has not only to do with bandwidth performance or form factor of the connector as a guarantee of success. Some non-scientific parameters also play a role in the alchemy, that’s why forecasting the success of a certain protocol is such a hard task, and can’t be reduced… Read More


Synopsys Awarded TSMC’s Interface IP Partner of the Year

Synopsys Awarded TSMC’s Interface IP Partner of the Year
by Eric Esteve on 11-09-2011 at 9:19 am

Is it surprising to see that Synopsys has been selected Interface IP partner of the year by TSMC? Not really, as the company is the clear leader on this IP market segment (which includes USB, PCI Express, SATA, DDRn, HDMI, MIPI and others protocols like Ethernet, DisplayPort, Hyper Transport, Infiniband, Serial RapidIO…). But,… Read More