Maybe I’ve spent too many years whiffing solder flux fumes and absorbing doses of X-band radiation in anechoic chambers, but I’m a firm believer in the axiom: “Give me enough engineers, and I can get 10 of anything to work right, once.” We have to make this … fit into this … using only this stuff … is what legends are made of.… Read More
How About a Quality-Aware IP Design Flow
In the EDA world we use hyphens quite often to describe our technical approaches, like: DFM-aware, Power-aware, Variation-aware. I just read a white papertoday on the topic of Quality-Aware IP Design Flows, written by Fractal Technologies. If your group creates IP or re-uses IP, then there’s always the question about … Read More
DRM2PDK: From design rule manual to process design kit
Exactly a year ago Sage Design Automation launched its revolutionary iDRM product, enabling for the first time to graphically capture design rules and compile them into checks automatically – no programming required. Using the graphical design rule editor, users could draw the layout topology that describes the design… Read More
Dark Silicon
One of the problems with chips today is that of so-called “dark silicon”. We can put massive functionality on an SoC today. A billion transistors, and that is just at 28nm. But power constraints (both leakage and dynamic power) limit how much of the chip can be powered up at any one time. In some cases this is not that big… Read More
Fabless Book Giveaway at #51DAC!
The generosity of the fabless semiconductor ecosystem never ceases to amaze me. Paul McLellan and I wrote a book for the greater good and now key members of our industry will make sure that 1,500 people at this year’s Design Automation Conference will get copies. As a special thank you to all of our supporters SemiWiki will be hosting… Read More
Virtual Fabrication: Not just for fabs. Fabless companies can benefit from more visibility into process technology
Ever since I started talking about Virtual Fabrication I have mostly looked at it from the manufacturers’ perspective, where it has obvious benefits to develop and model new process technology. But what about the fabless design concept and indeed even the semiconductor IP world that has spawned from it as well? It seems that Virtual… Read More
STM FD-SOI Manufacturing Double Source: Samsung
Let’s start with apologies: when guessing that SMIC would be the 2[SUP]nd[/SUP] source foundry for ST-Microelectronics 28nm FD-SOI, I was wrong. To be honest, if I had made the assumption that Samsung was this double source, I would have generated dozen of comments, calling me “crazy blogger”…for the best. Announcing Samsung… Read More
Samsung Endorses FD-SOI!
This is probably one of the biggest stories we will cover this month, if not this year, absolutely. In partnership with STMicroelectronics, Samsung will manufacture 28nm FD-SOI chips for the fabless semiconductor community starting now. This proves without a shadow of a doubt that Samsung is serious about the foundry business.… Read More
Teach Yourself Silvaco
In the dim and distant past, if you wanted to learn how to use a particular EDA tool then you would go on a training course. This would often be multiple days and often a significant dollar investment too. For most EDA companies, that option still exists and the big 3 have quite extensive training catalogs.
But nowadays it is often easier… Read More
New Frontiers in MEMS and Their Enablers
With the 51[SUP]st[/SUP] DACapproaching quickly, I spent some time last week-end to look around about what new trends, technologies and innovations will be most talked about during DAC. Every year, I find some exciting new technologies in the semiconductor industry and the overall semiconductor ecosystem that get wider exposure… Read More