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DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.

DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.
by Daniel Nenni on 07-13-2026 at 2:00 pm

DAC 2026 luncheon promo 400x400 (1)

Accellera Systems Initiative invites the design and verification community to join us at the 2026 Design Automation Conference for a focused technical luncheon, Embracing AI for Advanced Design and Verification,” on Tuesday, July 28, from 12:30–1:45 p.m. at the Long Beach Convention Center, Meeting Room 104C.

Artificial… Read More


Podcast EP355: An Overview of the Q126 Electronic Design Market Data Report with Wally Rhines

Podcast EP355: An Overview of the Q126 Electronic Design Market Data Report with Wally Rhines
by Daniel Nenni on 07-13-2026 at 10:00 am

Daniel is joined by Wally Rhines, CEO of Silvaco to discuss the Electronic Design Market Data report that was just released. Wally is the industry coordinator for the EDA data collection program called EDMD. SEMI and the Electronic System Design Alliance collect data from almost all of the electronic design automation companies… Read More


AI Driven Semiconductor Systems

AI Driven Semiconductor Systems
by Daniel Nenni on 07-12-2026 at 8:00 pm

AI Driven Semiconductor Systems NetApp

AI-driven semiconductor systems are the next major transformation in chip design and manufacturing. The central idea is that semiconductor workflows are becoming too complex, too data-intensive, and too time-sensitive to be managed only through traditional human-driven engineering processes. Modern chips now involve… Read More


SemiAnalysis EDA Market Primer – Market Dynamics, Cadence, Synopsys, Siemens, China EDA Rise

SemiAnalysis EDA Market Primer – Market Dynamics, Cadence, Synopsys, Siemens, China EDA Rise
by Daniel Nenni on 07-09-2026 at 10:00 am

EDA Industry Primer SemiAnalysis

Electronic Design Automation, or EDA, is the software infrastructure that transforms a hardware specification into a manufacturable integrated circuit. At advanced process nodes, the problem is no longer simply drawing transistors or connecting gates. A modern system-on-chip contains billions of standard cells, hundreds… Read More


WEBINAR: Why Google Cloud NetApp Volumes Matter for Modern EDA Workloads

WEBINAR: Why Google Cloud NetApp Volumes Matter for Modern EDA Workloads
by Daniel Nenni on 06-25-2026 at 2:00 pm

Why Google Cloud NetApp Volumes Matter for Modern EDA Workloads

In this webinar, Google Cloud and NetApp explore how semiconductor companies can address the growing infrastructure demands of modern Electronic Design Automation (EDA) workflows. As process technologies continue to advance and chip designs become increasingly complex, engineering teams require scalable, high-performance… Read More


How Samtec Blazes a Trail to 224/448 Gbps at DesignCon 26

How Samtec Blazes a Trail to 224/448 Gbps at DesignCon 26
by Mike Gianfagna on 06-23-2026 at 6:00 am

How Samtec Blazes a Trail to 224:448 Gbps at DesignCon 26

I recently covered what Samtec was doing at DesignCon 26. Samtec has a tendency to dominate any show it attends in multiple dimensions. The prior post focused on the company’s contributions to the technical agenda and the high-profile experts in attendance. While all that is interesting and valuable, attending a large show like… Read More


AION Silicon: Architecting Smarter SoCs with RISC-V: Balancing Performance, Flexibility, and Risk

AION Silicon: Architecting Smarter SoCs with RISC-V: Balancing Performance, Flexibility, and Risk
by Daniel Nenni on 06-22-2026 at 10:00 am

AION Silicon Architecting Smarter SoCs with RISC V

As semiconductor complexity accelerates across AI, automotive, and edge computing markets, SoC architecture has become a critical determinant of commercial success. Modern silicon programs must simultaneously achieve aggressive performance-per-watt targets, support evolving workloads, and maintain manageable development… Read More


Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering Partner

Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering Partner
by Kalar Rajendiran on 06-15-2026 at 6:00 am

ESDA Panel Session June 10, 2026 IMG 6708

Highlights from a recent panel session moderated by Ed Sperling (Semiconductor Engineering) featuring Walden Rhines (Silvaco), Vincent Wong (Verific), Dave Kelf (Breker Verification Systems), Shelly Henry (MooresLab AI), Ann Wu (Silimate), and Cindy Cui (ChipAgents). The panel session was hosted by Electronic System … Read More


CEO Interview with Chuck Gershman of Owl Autonomous Imaging

CEO Interview with Chuck Gershman of Owl Autonomous Imaging
by Daniel Nenni on 06-07-2026 at 4:00 pm

Chuck2 B fav

Chuck Gershman is the CEO and co-founder of Owl Autonomous Imaging. He has spent more than 30 years in semiconductors, AI imaging, computer vision, and autonomous sensing technologies across executive management, engineering, marketing, business development, and operations.

Chuck is a Drexel University College of Engineering… Read More


Alchip Accelerates on AI ASIC Demand

Alchip Accelerates on AI ASIC Demand
by Daniel Nenni on 06-04-2026 at 8:00 am

Alchip Accelerates on AI ASIC Demand

Alchip Technologies reported improved financial results for the first quarter, reflecting continued momentum in advanced artificial intelligence (AI), high-performance computing (HPC), and custom ASIC demand. The company cited stronger customer engagement in leading-edge semiconductor designs and accelerating tape-out… Read More