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For a long time, package engineering was part of the cleanup crew for chip design. The glory was all around the design of advance monolithic chips on the latest technology node. Once the design was done, the package/test team would take the design over the finish line, adding the required I/O specs, lead frame, load board and test … Read More
– High NA EUV’s coming out party – “Dawn” of the Angstrom Era
– Well attended, positive vibes, not much new but good progress
– Concerns about Samsung slowing spend while Intel accelerates
– KLA reticle inspection quandary – Risky business in China
Larry has grown Sarcina from designing semiconductor packages for a few small companies, to doing package designs for top semiconductor companies around the world. From 2014 to 2018, Larry led the expansion of Sarcina beyond package design into final test and wafer sort hardware and software development.
Larry is a semiconductor… Read More
The subjects of Generative AI and Large Language Models (LLMs) permeate businesses and the public conversation. It’s not without good reason! While this emergent field of AI develops, it is now seen at a minimum as a valuable assistant, or, often, a dramatic accelerant to productivity, even to technical workflows.
As we’re … Read More
A different approach to formally verifying very challenging datapath functions. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome. We’re planning to add a wrinkle… Read More
When I first saw the Silicon Catalyst business plan 10 years ago I had very high hopes. Silicon Valley design starts were falling and Venture Capital Firms were distracted by software companies even though without silicon there would be no software.
Silicon Catalyst is an organization focused on accelerating silicon-based startups.… Read More
– AMAT slightly better than expected, flat & guides flat but > expected
– Expects better 2024- Systems flat, service up, display down
– China risk remains high at 45%- $200M Sculpta expected in 2024
– HBM 5% of industry but not a lot of tool sales- but high growth
Still bumping along with flattish … Read More
For the 2024 SEMI International Strategy Symposium I was challenged by members of the organizing committee to look at where logic will be in ten years from a technology, economics, and sustainability perspective. The following is a discussion of my presentation.
To understand logic, I believe it is useful to understand what makes… Read More
The global semiconductor market grew 8.4% in 4Q 2023 from 3Q 2023, according to WSTS. The 8.4% gain was the highest quarter-to-quarter growth since 9.1% in 2Q 2021. This was also the highest 3Q to 4Q increase in 20 years, since an 11% rise in 4Q 2003. 4Q 2023 was up 11.6% from a year ago, following five quarters of negative year-to-year… Read More
Axiomise pioneered the adoption of formal verification in the semiconductor industry since 2017. Led by visionary CEO, Dr. Ashish Darbari, who has 63 patents in formal verification, and Neil Dunlop an industry veteran with 40 years of experience, Axiomise has helped twenty customers over the last six years by providing them… Read More
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