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Future Semiconductor Technology Innovations

Future Semiconductor Technology Innovations
by Tom Dillinger on 07-19-2022 at 6:00 am

2D metals

At the recent VLSI Symposium on Technology and Circuits, Dr. Y.J. Mii, Senior Vice President of Research and Development at TSMC, gave a plenary talk entitled, “Semiconductor Innovations, from Device to System”.  The presentation offered insights into TSMC’s future R&D initiatives, beyond the current roadmap.  The associated… Read More


3D Device Technology Development

3D Device Technology Development
by Tom Dillinger on 07-13-2022 at 6:00 am

CFET cross section v2

The VLSI Symposium on Technology and Circuits provides a deep dive on recent technical advances, as well as a view into the research efforts that will be transitioning to production in the near future.  In a short course presentation at the Symposium, Marko Radosavljevic, from the Components Research group at Intel, provided … Read More


Intel Foundry Services Puts PDKs in the Cloud

Intel Foundry Services Puts PDKs in the Cloud
by Daniel Nenni on 06-28-2022 at 10:00 am

Intel Foundry Services Roadmap

Intel announced today that they are partnering with cloud and EDA companies to better enable their foundry business. This is a natural extension of the Accelerator ecosystem program announced earlier. More and more chip designs are being done in the cloud and from my experience cloud based designs are better. Some companies use… Read More


TSMC 2022 Technology Symposium Review – Advanced Packaging Development

TSMC 2022 Technology Symposium Review – Advanced Packaging Development
by Tom Dillinger on 06-27-2022 at 6:00 am

3D blox

TSMC recently held their annual Technology Symposium in Santa Clara, CA.  The presentations provide a comprehensive overview of their technology status and upcoming roadmap, covering all facets of the process technology and advanced packaging development.  This article will summarize the highlights of the advanced packaging… Read More


TSMC 2022 Technology Symposium Review – Process Technology Development

TSMC 2022 Technology Symposium Review – Process Technology Development
by Tom Dillinger on 06-22-2022 at 5:00 am

finFLEX

TSMC recently held their annual Technology Symposium in Santa Clara, CA.  The presentations provided a comprehensive overview of their status and upcoming roadmap, covering all facets of process technology and advanced packaging development.  This article will summarize the highlights of the process technology updates… Read More


Three Key Takeaways from the 2022 TSMC Technical Symposium!

Three Key Takeaways from the 2022 TSMC Technical Symposium!
by Daniel Nenni on 06-16-2022 at 12:10 pm

TSMC Technology Roadmap 2022

The TSMC Technical Symposium is today so I wanted to give you a brief summary of what was presented. Tom Dillinger will do a more technical review as he has done in the past. I don’t want to steal his thunder but here is what I think are the key takeaways. First a brief history lesson.

The history of TSMC Technology Development with 12 keyRead More


Intel 4 Deep Dive

Intel 4 Deep Dive
by Scotten Jones on 06-13-2022 at 6:00 am

Figure 1

As I previously wrote about here, Intel is presenting their Intel 4 process at the VLSI Technology conference. Last Wednesday Bernhard Sell (Ben) from Intel gave the press a briefing on the process and provided us with early access to the paper (embargoed until Sunday 6/12).

“Intel 4 CMOS Technology Featuring Advanced FinFET TransistorsRead More


An Update on In-Line Wafer Inspection Technology

An Update on In-Line Wafer Inspection Technology
by Tom Dillinger on 06-06-2022 at 6:00 am

inspection overview

From initial process technology development (TD) to high volume manufacturing (HVM) status for a new node, one of the key support functions to improve and maintain yield is the in-line wafer inspection technology.  Actually, there are multiple inspection technologies commonly employed, with tradeoffs in pixel resolution,… Read More


Inverse Lithography Technology – A Status Update from TSMC

Inverse Lithography Technology – A Status Update from TSMC
by Tom Dillinger on 06-02-2022 at 6:00 am

ILT mask rules

“Inverse lithography technology (ILT) represents the most significant EDA advance in the last two decades.”  Danping Peng from TSMC made that assertion at the recent SPIE Advanced Lithography + Patterning Conference, in his talk entitled:  ILT for HVM:  History, Present, and Future.  This article summarizes the highlights… Read More


0.55 High-NA Lithography Update

0.55 High-NA Lithography Update
by Tom Dillinger on 05-31-2022 at 6:00 am

mask infrastructure 0 55

At the recent SPIE Advanced Lithography + Patterning Conference, Mark Phillips from Intel gave an insightful update on the status of the introduction of the 0.55 high numerical aperture extreme ultraviolet lithography technology.  Mark went so far as to assert that the development progress toward high-NA EUV would support … Read More